Samsung Electronics Co., Ltd.

Soon-Kwon Lim

Chang-Oh Jeong

Je-Hun Lee

Do-Hyun Kim

Eun-Guk Lee

Jang-Sub Kim

Dong-Jo Kim

Myung-Sung Kim

Sun-Ho Jeong

Kyoo-Hee Woo

Joo-Ho Moon

A thin film transistor array substrate comprising a base substrate, a first wire on the base substrate, a first insulating layer on the base substrate to cover the first wire, a semiconductor layer on the first insulating layer, a second insulating layer on the first insulating layer on which the semiconductor layer is formed, and a second wire on the second insulating layer on the second insulating layer is provided, and a portion of the second wire makes contact with the semiconductor layer through the contact hole.

Thin film transistor substrate and method of manufacturing the same

A thin film transistor substrate and a method of manufacturing the same are disclosed. The method of manufacturing a thin film transistor substrate includes forming a first conductive pattern group including a gate line, a gate electrode, and a lower gate pad electrode on a substrate, forming a gate insulating layer on the substrate on which the first conductive pattern group is formed, forming an oxide semiconductor pattern overlapping the gate electrode on the gate insulating layer, and forming first and second conductive layers on the substrate on which the oxide semiconductor pattern is formed and patterning the first and second conductive layers to form a second conductive pattern group including a data line, a source electrode, a drain electrode, and a data pad.

Thin film transistor substrate having transparent conductive metal and method of manufacturing the same

A conductive ink composition includes about 15% to about 50% by weight of copper nanoparticles, about 40% to about 80% by weight of a non-aqueous solvent mixture, about 0.01% to about 5% by weight of a dispersion agent and about 1% to about 20% by weight of a wetting agent. A conductive pattern may be formed with use of the conductive ink composition and an inkjet printer.

Conductive ink composition and method of forming a conductive pattern using the same

A method of producing a bipolar CMOS device for providing a unipolar CMOS transistor with a polysilicon gate and a self-aligned NPN and VPNP transistor on a same chip, so that a high performance analog and digital BiCMOS device can be realized.

Method of producing a bipolar CMOS device

Growing community of inventors

Yongin-si, South Korea

Soon-Kwon Lim