Samsung Electronics Co., Ltd.

Samsung Display Co., Ltd.

Soon-Il Ahn

Byoung-Sun Na

Seung-Soo Baek

Seong-Young Lee

Kee-Bum Park

Ho-Kyoon Kwon

Hye-Seok Na

Dong-Hyeon Ki

Ji-Hyun Kwon

You-Lee Song

Kyung-Ho Park

Yeong-Keun Kwon

Won-hee Lee

Yoon-Jang Kim

Jeong-Young Lee

Hee-Wook Do

Hye-ran You

Min-cheol Lee

Seung-hoo Yoo

Dong-Hyon Ki

Hyun-Cheol Moon

An apparatus and method of preventing signal delay in a display device according to the present invention includes a first substrate, a driving portion formed on the first substrate, a plurality of signal lines formed on the first substrate to transmit signals to the driving portion, a second substrate facing the first substrate, and a conductive member formed on the second substrate, wherein the driving portion overlaps with the conductive member, and the signal lines overlap with the conductive member at a position outside a display area. Accordingly, the capacitances between the signal lines may be substantially the same.

Apparatus and method of preventing signal delay in display device

An apparatus and method of preventing signal delay in a display device according to the present invention includes a first substrate, a driving portion formed on the first substrate, a plurality of signal lines formed on the first substrate to transmit signals to the driving portion, a second substrate facing the first substrate, and a conductive member formed on the second substrate, wherein the driving portion overlaps with the conductive member, and the signal lines and the conductive member do not overlap. Accordingly, the capacitances between the signal lines may be substantially the same.

A gate driver that comprises n shift registers, wherein n is an integer equal to or larger than 1, each of the n shift registers includes; a start stage which outputs a gate signal and starts its operation in response to a start signal, and a plurality of subsequent stages which are connected to each other in sequence, and which sequentially output a plurality of gate signals in response to a signal output from the start stage, wherein at least one stage of the plurality of subsequent stages is reset by the start signal.

Gate driver and display apparatus having the same

A display device according to the present invention includes a first substrate, a driving portion formed on the first substrate, a plurality of signal lines formed on the first substrate to transmit signals to the driving portion, a second substrate facing the first substrate, and a conductive member formed on the second substrate, wherein the driving portion overlaps with the conductive member, and the signal lines are disposed at a position outside a region of overlap of the conductive member. Accordingly, the capacitances between the signal lines may be substantially the same.

A thin film transistor array panel for a liquid crystal display, a liquid crystal display and a manufacturing method thereof are provided. The display panel includes: a substrate; and a first electrode portion disposed on the substrate, the first electrode portion having two pairs of main edges facing each other and a first cutout oblique to the main edges, wherein the main edges include first and second edges, the first electrode portion has an oblique edge substantially parallel to the first cutout, the oblique connecting the first edge and the second edge, the first edge includes a first portion extending from the oblique edge to an end of the first cutout, and the oblique edge is substantially equal to or longer than a half of the first portion of the first edge.

Liquid crystal display and a display panel therefor

A liquid crystal display includes a substrate including a longer first side and a shorter second side, a plurality of gate lines disposed on the substrate, a plurality of data lines disposed on the substrate perpendicular to and insulated from the gate lines, and a plurality of pixel electrodes, each pixel electrode electrically connected to a data line by a switching element, wherein a number of the gate lines is about half of a number of the pixel electrodes, and the data lines extend in a direction which is substantially parallel to a direction of the first side.

Pixel array layout of a liquid crystal display

An apparatus and method of preventing signal delay in display device according to the present invention includes a first substrate, a driving portion formed on the first substrate, a plurality of signal lines formed on the first substrate to transmit signals to the driving portion, a second substrate facing the first substrate, and a conductive member formed on the second substrate, wherein the driving portion overlaps with the conductive member, and the signal lines and the conductive member do not overlap. Accordingly, the capacitances between the signal lines may be substantially the same.

In a gate driving circuit and a display apparatus having the gate driving circuit, a pull-up transistor of a present stage among plural stages, which are connected one after another to each other and sequentially output a gate signal, pulls up a present gate signal output through an output terminal to a gate-on voltage. A buffer transistor is connected to a control terminal of the pull-up transistor to receive a previous output signal from a previous stage and to turn on the pull-up transistor. The buffer transistor has a chargeability that is about two times or greater than the chargeability of the pull-up transistor. Thus, the size of the pull-up transistor may be reduced, thereby preventing a malfunction of the gate driving circuit when the gate driving circuit is operated under conditions of high temperature or low temperature.

Gate driving circuit, display apparatus having the same, and method thereof

A liquid crystal display according to an embodiment of the invention includes a substrate, a plurality of gate lines formed on the substrate, a plurality of data lines formed on the substrate to intersect the gate lines, and a plurality of pixel electrodes formed on the substrate. In the liquid crystal display, the pixel electrode includes a first main side substantially parallel with the gate line, a second main side substantially parallel with the data line, a first oblique side making a first oblique angle with respect to the first and second main sides, and a second oblique side making a second oblique angle with respect to the first and second main sides. The first oblique angle and the second oblique angle are different from each other.

Liquid crystal display

In a display panel, main and sub pixel electrodes are connected to first and second drain electrodes of a thin film transistor, respectively, to receive a data voltage during a 1 H period as main and sub pixel voltages. A main storage electrode overlaps the main pixel electrode to receive a first common voltage that varies with the gate pulse and the polarity of the data voltage. A sub storage electrode overlaps the sub pixel electrode to receive a second common voltage that is uniformly maintained at a constant voltage level. The sub pixel voltage is uniformly maintained by the second common voltage, but the main pixel voltage is shifted up or down by the first common voltage. Thus, the main pixel voltage may have a voltage level higher than that of the sub pixel voltage.

Display panel

Provided are a thin-film transistor (TFT) substrate and a display device having the same. In the TFT substrate and the display device having the same, first and second drain electrodes of first and second TFTs connected to first and second pixel electrodes, respectively, are vertically bent a plurality of times. The distance between each of the first and second source electrodes and the first or second drain electrode is maintained at a minimum interline gap to increase the distance between a data line and each of the first and second drain electrodes and minimize the length of a region of each of the first and second drain electrodes adjacent to the data line. Consequently, a coupling capacitance between the data line and each of the first and second drain electrodes can be reduced, and each unit pixel region can have a uniform parasite capacitance within a predetermined range. In addition, the luminance deviation of a display device, which performs inversion driving, can be reduced.

Thin-film transistor substrate and display device having the same

To improve product yield, light is scanned on a layer on a substrate through a mask. A pattern is formed on the substrate by the exposure of the layer. The direction of scanning is substantially perpendicular to a longitudinal direction of the pattern. The capacitance difference due to coupling of the pattern to be formed and a conductive layer formed through an insulation layer is reduced. Thus, failures of a display device are reduced and the product yield is increased.

Method of exposing layer with light and method of manufacturing thin film transistor substrate for liquid crystal display device using the same

An LCD having an enhanced light transmittance and improved lateral visibility includes gate and storage electrode lines formed on a first insulating substrate, a data line insulated from and crossing the gate line, a first source electrode partially overlapping an nth gate line and connected to the data line, first and second drain electrodes partially overlapping the nth gate line and separated from the first source electrode, a first sub-pixel electrode electrically connected to a first drain electrode, a second sub-pixel electrode electrically connected to a second drain electrode, a second source electrode partially overlapping an (n+1)th gate line and electrically connected to the second sub-pixel electrode, and a third drain electrode partially overlapping the (n+1)th gate line and separated from the second source electrode and operable to boost a charge voltage of the first sub-pixel electrode and to drop a charge voltage of the second sub-pixel electrode.

Liquid crystal displays

A liquid crystal display (LCD) capable of preventing texture, light leakage, and/or formation of an instantaneous afterimage while improving an aperture ratio is presented. The LCD includes a first insulating substrate, a gate line formed on the first insulating substrate, a data line insulated from the gate line and extending substantially perpendicularly to the gate line wherein the gate line and the data line define a pixel, and a thin film transistor (TFT) connected to the gate line and the data line. A first sub-pixel electrode is connected to the TFT, and a second sub-pixel electrode is capacitively coupled to the first sub-pixel electrode through a coupling electrode, the second sub-pixel electrode being separated from the first sub-pixel electrode by a gap. The LCD also includes a second insulating substrate, a common electrode formed on the second insulating substrate and including a domain divider, and a liquid crystal layer interposed between the first insulating substrate and the second insulating substrate. A coupling electrode connecting portion connects the TFT to the coupling electrode and intersects the gap at a region along an edge of the pixel.

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Cheonan-si, South Korea

Soon-Il Ahn