Skhynix Inc.

Hynix Semiconductor Inc.

Sook-Joo Kim

Hyung-Suk Lee

Jae-Geun Oh

Min-Gyu Sung

Heung-Jae Cho

Tae-Yoon Kim

Se-Aug Jang

Hong-Seon Yang

Keum-Bum Lee

Deok-Sin Kil

Sung-Hoon Lee

Young-Ju Lee

Ji-Won Moon

An electronic device comprising a semiconductor memory unit that includes a resistance variable element formed over a substrate, and including stacked therein a bottom electrode, a variable resistance layer and a top electrode, and a barrier layer formed over the resistance variable element, and including an amorphous silicon layer which is doped with at least one kind of impurity.

Electronic device and method for fabricating the same

An electronic device including a semiconductor memory is provided. The semiconductor memory may include an interlayer dielectric layer having a hole; a conductive pattern filled in the hole; and a variable resistance element coupled with the conductive pattern over the conductive pattern and storing different data according to a resistance change, wherein the conductive pattern includes a carbon-containing conductive layer in a region adjacent to the variable resistance element.

Electronic device

An electronic device with improved variable resistance characteristics and a method for fabricating the same are provided. In an embodiment of the disclosed technology, a method for forming an electronic device with a semiconductor memory includes forming a crystalized doped layer over a substrate; forming a barrier layer over the doped layer; forming a metal layer over the barrier layer; and reacting the barrier layer with a portion of the metal layer. The electronic device and the method of fabricating the same according to embodiments of the disclosed technology may have improved variable resistance characteristics.

A variable resistance memory device that includes a first electrode, a second electrode, a variable resistance layer interposed between the first electrode and a second electrode. A metal oxide electrode is interposed between the first electrode and the variable resistance layer, and the metal oxide electrode does not include a nitrogen constituent.

Variable resistance memory device and method for fabricating the same

A semiconductor device including vertical channel transistor and a method for forming the transistor, which can significantly decrease the resistance of a word line is provided. A vertical channel transistor includes a substrate including pillars each of which has a lower portion corresponding to a channel region. A gate insulation layer is formed over the substrate including the pillars. A metal layer having a low resistance is used for forming a surrounding gate electrode to decrease resistance of a word line. A barrier metal layer is formed between a gate insulation layer and a surrounding gate electrode so that deterioration of characteristics of the insulation layer is prevented. A world line is formed connecting gate electrodes formed over the barrier layer to surround the lower portion of each pillar.

Transistor having vertical channel

A semiconductor device includes a lower electrode, a variable resistance layer disposed over the lower electrode, the variable resistance layer is included a reactive metal layer being interposed between a plurality of oxide resistive layers and an upper electrode disposed over the variable resistance layer.

Growing community of inventors

Icheon-si, South Korea

Sook-Joo Kim