Samsung Electronics Co., Ltd.

Sooho Cha

Chan-Kyung Kim

Yongsik Youn

Adrian E Ong

DongSeok Kang

Example embodiments include a resistive type memory sense amplifier circuit including differential output terminals, first and second input terminals, a pre-charge section, and other components arranged so that current is re-used during at least a 'set' or 'amplification' stage of the sense amplifier circuit, thereby reducing overall current consumption of the circuit, and improving noise immunity. A voltage level of a high-impedance output terminal is caused to swing in response to a delta average current between a reference line current and a bit line current. During a &#x201c;go&#x201d; or &#x201c;latch&#x201d; stage of operation, a logical value &#x201c;0&#x201d; or &#x201c;1&#x201d; is latched at the differential output terminals based on positive feedback of a latch circuit. Also disclosed is a current mirror circuit, which can be used in conjunction with the disclosed sense amplifier circuit. In yet another embodiment, a sense amplifier circuit includes the capability of read/re-write operation.

Sense amplifier circuitry for resistive type memory

Example embodiments include a level shifting write driver in a sense amplifier for a resistive type memory. The write driver may include a cross-coupled latch circuit, a first output section, a second output section, and an input section. The first output section includes one or more first driving transistors to drive a first current through the first output section and not through the cross-coupled latch. The second output section includes one or more second driving transistors configured to drive a second current through the second output section and not through the cross-coupled latch. The current flows of the outputs sections are isolated from the latch circuit. In some embodiments, no two PMOS type transistors are serially connected, thereby reducing the consumption of die area. In some embodiments, a single control signal is used to operate the write driver.

Write driver in sense amplifier for resistive type memory

Example embodiments include a resistive type memory current sense amplifier circuit including differential output terminals, first and second input terminals, pre-charge transistors, and current modulating transistors coupled directly to the pre-charge transistors. The pre-charge configuration provides high peak currents to charge the bit line and reference line during a 'ready' or 'pre-charge' stage of operation of the current sense amplifier circuit. The current modulating transistors are configured to operate in a saturation region mode during at least a &#x201c;set&#x201d; or &#x201c;amplification&#x201d; stage. The current modulating transistors continuously average a bit line current and a reference line current during the &#x201c;set&#x201d; or &#x201c;amplification&#x201d; stage, thereby improving noise immunity of the circuit. During a &#x201c;go&#x201d; or &#x201c;latch&#x201d; stage of operation, a logical value &#x201c;0&#x201d; or &#x201c;1&#x201d; is latched at the differential output terminals based on positive feedback of a latch circuit.

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Seoul, South Korea

Sooho Cha