Samsung Electronics Co., Ltd.

Soo-Han Choi

Dong-hyun Kim

Moon-Hyun Yoo

Chul-Hong Park

Yoo-Hyon Kim

Jung-Ho Do

Chul-hong Park

Sang-Pil Sim

Hyun-jong Lee

Jeong-Lim Nam

Hye-Soo Shin

Moon-hyun Yoo

Yong-Jin Chun

Joon-ho Choi

Ji-suk Hong

Young-Chan Ban

A method of forming a pattern includes defining a plurality of patterns, defining a plurality of pitch violating patterns that contact the plurality of patterns and correspond to regions between the patterns, classifying the plurality of pitch violating patterns into a first region and a second region that is adjacent to the first region, selecting one of the first region and the second region, and forming an initial pattern defined as the selected first or second region. The selecting includes performing at least one of i) selecting a region that contact dummy patterns, ii) selecting a region of a same kind as one region, and iii) selecting a region that contacts a concave part of an enclosure from the first region and the second region.

Method of forming a pattern

Provided are a system for analyzing a mask topography, which can reduce calculation time and increase calculation accuracy in consideration of a mask topography effect, and a method of forming an image using the system. The system and method simultaneously obtains a first electric field using a Kirchhoff method without considering a pitch formed on a mask and obtains a second electric field using an electromagnetic field analysis method considering the pitch, and then determines a third electric field on a pupil surface of a projection lens by combining the first electric field and the second electric field of forming an image, so as to calculate the image of an optical lithography system which includes an illumination system and a projection optical system and to which the projection lens belongs.

System for analyzing mask topography and method of forming image using the system

A method of creating a layout of a set of masks including an alternating phase shifting mask (APSM) and a halftone phase shifting trim mask (HPSTM) is provided. The APSM includes first and second phase shifting areas and a first opaque pattern. The first and second phase shifting areas are disposed adjacent to each other and have different phases for generating destructive interference. Further, the first and second phase shifting areas define an access interconnection line. The first opaque pattern is formed on a transparent substrate to define the first and second phase shifting areas. The HPSTM includes a second opaque pattern on the transparent substrate and a halftone pattern. The second opaque pattern prevents an access interconnection line from being erased. The halftone pattern defines a pass interconnection line connected to the access interconnection line.

Method of creating a layout of a set of masks

A phase edge phase shift mask and a fabrication method thereof for enforcing a width of a field gate image located on a field region, which is weakened by a two exposure process, by using a phase shift mask and a trim mask on a semiconductor substrate, and enforcing a width of the field gate image to maximize a current driving capability of the semiconductor device.

Phase edge phase shift mask enforcing a width of a field gate image and fabrication method thereof

A set of masks including an alternating phase shifting mask (APSM) and a halftone phase shifting trim mask (HPSTM) is provided. The APSM includes first and second phase shifting areas and a first opaque pattern. The first and second phase shifting areas are disposed adjacent to each other and have different phases for generating destructive interference. Further, the first and second phase shifting areas define an access interconnection line. The first opaque pattern is formed on a transparent substrate to define the first and second phase shifting areas. The HPSTM includes a second opaque pattern on the transparent substrate and a halftone pattern. The second opaque pattern prevents an access interconnection line from being erased. The halftone pattern defines a pass interconnection line connected to the access interconnection line.

Mask for manufacturing a highly-integrated circuit device

Growing community of inventors

Kyungki-do, South Korea

Soo-Han Choi