Advanced Micro Devices Corporation

Inventec Corp.

Inventec (pudong) Technology Corporation

Hewlett-packard Development Company, L.p.

Shanghai Svm Medical Technology Co., Ltd.

Song Zhang

Jing Lan Chen

Dong Wang

Hua Zhang

Xiaobo Huang

Jian Sun

Jinjing Zhang

Ping-Wei Peng

Bin Zhu

Min Yu

Xiao-Bing Zou

Yan-Long Sun

Yi Wu

Jiantan Liu

De-Ming Xu

Yundai Chen

Baoshi Han

Yun Long

Qian Zhai

Xiao-Hua Zhou

Longxiang Su

Hongli He

Yunping Lan

Zujun Tang

Haoyu Yang

Haiquan Cao

Xiangde Zheng

Xinkang Wang

Sinan Sun

Systems, apparatuses, and methods for converting data to a tiling format when implementing convolutional neural networks are disclosed. A system includes at least a memory, a cache, a processor, and a plurality of compute units. The memory stores a first buffer and a second buffer in a linear format, where the first buffer stores convolutional filter data and the second buffer stores image data. The processor converts the first and second buffers from the linear format to third and fourth buffers, respectively, in a tiling format. The plurality of compute units load the tiling-formatted data from the third and fourth buffers in memory to the cache and then perform a convolutional filter operation on the tiling-formatted data. The system generates a classification of a first dataset based on a result of the convolutional filter operation.

Tiling format for convolutional neural networks

A blade server has a casing, a plurality of blade server module boards, a first chassis management controller (CMC) and a second CMC. There are a plurality of main board slots at a first side of the casing and at least a first CMC slot and a second CMC slot at a second side of the casing opposite to the first side. The plurality of main board slots are all electrically connected to both of the first CMC slot and the second CMC slot, wherein the first CMC slot and the second CMC slot are electrically connected to each other. The plurality of blade server module boards are plugged into the plurality of main board slots. The first CMC and the second CMC are redundant to each other. When one of the two CMCs malfunctions, the blade server module boards are controlled by the other one CMC functioning normally.

Blade server

A server system includes a system on chip (SOC), a baseboard management controller (BMC), a first switch and a connector. The SOC has a hardware debugging test (HDT) interface to generate a HDT signal. The BMC has a programming interface to generate a programming signal. The first switch receives the HDT signal and the programming signal. The connector couples with the first switch. A first control signal controls the first switch to select one of the HDT signal and the programming signal to output to the connector. When the connector receives the HDT signal, a debugging apparatus debugs the SOC according to the HDT signal. When the connector receives the programming signal, a programming apparatus performs a programming process for the BMC according to the programming signal.

Server system

The disclosure relates to a scantling unit () comprising an interlocking assembly (). The interlocking assembly () comprises; an interlock arm () pivotably connected to a scanner base of the scanning unit () and movable between a locked position and an unlocked position; and a biasing mechanism, for biasing the interlock arm toward the locked position, A combo gear () of the scanning unit () is locked by the interlocking assembly (), thereby being prevented from, rotating, before a scan bar driver gear () of the scanning unit () engages with the combo gear () of the scanning unit ().

Interlocking assembly for a scanning unit

A server including a basic input output system (BIOS) chip, a control unit and multiple central processing units (CPUs), and a booting method are provided. The BIOS chip outputs a booting signal. One of the CPUs receives the booting signal to execute a booting program, and outputs a successful signal after being booted. The control unit is coupled between the BIOS chip and the CPUs, and receives the successful signal to control a connection between the BIOS chip and the one of the CPUs. When the control unit receives the successful signal, the control unit replaces a connection between the BIOS chip and current one of the CPUs with a new connection between the BIOS chip and next one of the CPUs according to the successful signal, and the next CPU then receives the booting signal.

Server and booting method

Growing community of inventors

Shanghai, China

Song Zhang