Innochips Technology Co., Ltd.

Song Yeon Lee

Myung Ho Lee

In Kil Park

Tae Hyung Noh

Jung Hun Lee

Gyeong Tae Kim

Tae Geun Seo

Min Soo Lee

Euy Ho Shin

Hyun Mo Kang

Jin Hwan Kim

Gyeong-Tae Kim

Provided is a laminated chip device including a first laminate in which a plurality of conductor patterns formed on a plurality of sheets are connected to each other through a via formed to penetrate at least a sheet, and a second laminate provided over or below the first laminate and having a plurality of internal electrode patterns formed on a plurality of sheets, and the internal electrode patterns have a non-conductive region in at least a portion of an area corresponding to the via.

Laminated chip device

The present disclosure includes: a laminate in which a plurality of sheets are laminated; two or more noise filters provided spaced apart by a predetermined distance from each other in the laminate and respectively provided with a plurality of coil patterns; an external electrode provided outside the laminate and connected to the two or more noise filters; and a connection electrode provided outside the laminate being spaced apart from the external electrode to connect the two or more coil patterns.

Circuit protection device having noise filters

Provided is a circuit protection device including a plurality of sheets selectively formed with at least one coil pattern, at least one withdrawal electrode, at least one hole filled with a conductive material, and at least one capacitor electrode and at least two inductors and at least two capacitors, in which the at least one coil pattern forms one inductor and a capacitor is formed between the capacitor electrode and the coil pattern.

Circuit protection device

Growing community of inventors

Ansan-si, South Korea

Song Yeon Lee