Beijing Deephi Intelligent Technology Co., Ltd.

Xilinx, Inc.

Xilinx Technology Beijing Limited

Beijing Deephi Technology Co., Ltd.

Song Yao

Jincheng Yu

Hong Luo

Xiaoming Sun

Yi Shan

Lingzhi Sui

Kaiyuan Guo

The present invention relates to artificial neural network (ANN), for example, convolutional neural network (CNN). In particular, the present invention relates to how to implement and optimize a convolutional neural network based on an embedded FPGA. Specifically, it proposes a CPU+FPGA heterogeneous architecture to accelerate ANNs.

Combining CPU and special accelerator for implementing an artificial neural network

The disclosure provides a compilation method and system for heterogeneous computing platform, and a runtime method and system for supporting program execution on the heterogeneous computing platform. Inputting a trained neural network model to a Neural Network (NN) optimizing compiler to generate an NN assembly file corresponding to the neural network; inputting the NN assembly file to an NN assembler to generate an NN binary file corresponding to the neural network; compilation and assembling a neural network application developed by users in a high-level language using a host compiler toolchain to generate a corresponding host assembly file and a host binary file in sequence; and linking the NN binary file and the host binary file using a host linker to generate a single hybrid linking executable file. The technical solution of the present disclosure has the advantages such as good computing performance, strong scalability, strong compatibility and high flexibility.

Programming model of neural network-oriented heterogeneous computing platform

Computing system and controller thereof are disclosed for ensuring the correct logical relationship between multiple instructions during their parallel execution. The computing system comprises: a plurality of functional modules each performing a respective function in response to an instruction for the given functional module; and a controller for determining whether or not to send an instruction to a corresponding functional module according to dependency relationship between the plurality of instructions.

Computing system and controller thereof

Systems, apparatus and methods are provided for accelerating a complex neural network by fixed-point data quantization. An Artificial Neural Network (ANN) has branches and comprises convolutional layers CONV, CONV, . . . CONV n, fully connected layers FC, FC, . . . , FC m, and concatenation layers CONCAT, CONCAT, . . . , CONCAT L. n, m and L are positive integers. The ANN may be optimized by a method comprising: converting output of each of the CONV, FC and CONCAT layers into fixed-point numbers, identifying at least one sub-network from the ANN and for each sub-network, modifying the fixed-point range of each output of the previous-level layers of the CONCAT layer on the basis of the fixed-point range of the CONCAT layer. The sub-network has a CONCAT layer as its output. The CONCAT layer receives at least two outputs of previous-level layers as inputs and concatenates the inputs into one output.

Method and device for quantizing complex artificial neural network

The present invention relates to artificial neural network, for example, convolutional neural network. In particular, the present invention relates to how to implement and optimize a convolutional neural network based on an embedded FPGA. Specifically, it proposes an overall design process of compressing, fix-point quantization and compiling the neural network model.

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Beijing, China

Song Yao