Finisar Corporation

Schlumberger Technologies, Inc.

Song Miao

Chun Lei

Alex Klajic

Raj Cornelius

Andreas G Weber

Rudolf J Hofmeister

William R Freeman

Wajih Dalal

A general method is given for screening laser diodes for electrostatic discharge, (ESD), damage. The laser diode may be selectively isolated from the laser driver so that a current-voltage (I-V), curve can be taken and then compared to curves taken previously on the same laser diode to ascertain the possibility of ESD damage. Presumably the initial I-V curve will be representative of the characteristics of that particular laser in the undamaged state. Such an initial curve may be supplied by the manufacturer and may be a curve specific to a particular laser diode. Comparison with a standard curve is not sufficient to determine ESD damage in the early stages of failure. Some embodiments focus on isolating the laser diode from the laser driver, storing the information locally in the transceiver, and providing some analysis resulting in flagging laser diodes showing changes that are indicative of ESD damage.

Screening optical transceiver modules for electrostatic discharge damage

A method is provided for improving performance testing in semiconductor lasers via an accelerated life model. By using an accelerated life model, operating conditions for performance tests, such as burn-in procedures and wafer qualification, are optimized with reduced cost and effort. The method is also used to improve maintenance of optical networks containing semiconductor lasers.

Laser production and product qualification via accelerated life testing based on statistical modeling

Tester edge placement accuracy (EPA) is important for testing of semiconductor component devices. The value of that accuracy is quantified to the device manufacturer in terms of yield loss and bad parts sold as good parts (escapes in DPM). A simulation is presented that models the tester accuracy, the device edge distribution and their interaction for a example device having an operating speed of 800 Mbps. The same model can be applied for microprocessors or other parts that operate near the limits of ATE performance. In an example given, the estimated losses due to lack of appropriate tester accuracy are considerable: with the estimated yields and selling prices for the example device, the model shows a value of over $1 M for every 1 ps of enhanced tester edge placement accuracy.

Valuation of tester accuracy

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San Jose, CA, United States of America

Song Miao