Infineon Technologies Ag

Intel Mobile Communications Gmbh

Synopsys, Inc.

Song Chen

Christopher Woodthorpe

Venugopal Balasubramonian

Paul Chou

Keith Rieken

Joel D Medlock

Ravi Subramanian

John D Ralston

Ted E Williams

Kenneth M Hesky

Raju R Joag

Peivand Tehrani

Subramanyam Sripada

Rachid Helaihel

Hushrav Mogal

A system performs timing analysis of three-dimensional integrated circuits (3DICs). The circuit design is targeted for implementation on a stacked die that has a plurality of dies. The circuit design includes portions of the circuit design, each portion of the targeted for a different die. The system selects a net that crosses die boundaries and determines a plurality of sets of timing values of the net. The system determines a worst case slack value for the net based on the sets of timing values. The system determines a timing adjustment value for the net based on aggregate timing values determined from the sets of timing values. The system adjusts the worst case slack value for a net based on the timing adjustment value for each load pin of the net. The adjustment of the worst case slack reduces pessimism of the worst case slack value.

Static timing analysis of multi-die three-dimensional integrated circuits

Disclosed is a method and apparatus that takes timing information associated with a plurality of inputs to a cell, such as an AND-gate, within an integrated circuit (IC) design, store the timing information in a timing information register (TIR) associated with an index identifying the source of the timing information and track the source of the timing information for a predetermined number of cells through the index. The timing information in the TIRs is merged upon the index indicating that the timing information has been tracked through a predetermined number of cells.

Method and apparatus for reducing pessimism of graph based static timing analysis

A wireless communication system hosts a plurality of processes in accordance with a communication protocol. The system includes application specific instruction set processors (ASISPs) that provided computation support for the process. Each ASISP is capable of executing a subset of the functions of a communication protocol. A scheduler is used to schedule the ASISPs in a time-sliced algorithm so that each ASISP supports several processes. In this architecture, the ASISP actively performs computations for one of the supported processes (active process) at any given time. The state information of each process supported by a particular ASISP is stored in a memory bank that is uniquely associated with the ASISP. When a scheduler instructs an ASISP to change which process is the active process, the state information for the inactivated process is stored in the memory bank and the state information for the newly activated process is retrieved from the memory bank.

Distributed micro instruction set processor architecture for high-efficiency signal processing

The present invention provides a virtual machine interface (VMI) and an application programming interface (API) usable in conjunction with a reconfigurable wireless network communication apparatus. The reconfigurable wireless network communication apparatus comprises a plurality of hardware kernels. The apparatus can be reconfigured to support different or modified communication protocols over time. The VMI comprises a library of software objects. By configuring VMI software objects, a programmer selects the communication protocol used by the reconfigurable wireless network communication apparatus. The API of the present invention provides higher level management of the communication protocol used by a reconfigurable wireless network communication apparatus. The API comprises a library of high level software objects that further abstract hardware details of the apparatus.

Virtual machine interface for hardware reconfigurable and software programmable processors

A wireless communication base station comprising a plurality of application specific instruction set processors (ASISPs) configured to support one or more processes hosted by the base station, and to track process state information associated with each of the processes; and a memory configured to store the tracked process state information, and when an ASISP of the plurality of ASISPs is reallocated from a first process to a second process, the respective ASISP is configured to retrieve from the memory process state information for the second process.

Distributed micro instructions set processor architecture for high-efficiency signal processing

An efficient software download to a configurable communication device is disclosed herein. The method of efficiently downloading software begins with a step of receiving a request to configure a communication device to run a communication application. The communication device being configured has a plurality of function blocks with a fixed portion of hardware and a flexible portion of hardware, wherein the same plurality of function blocks is capable of operating a plurality of communication applications. In a next step, the capability of the fixed portion and the flexible portion of hardware of the communication device is evaluated for a capability of implementing the communication application. Next, configuration information only for the flexible portion of hardware of the communication device is transmitted to the communication device to enable it to operate the communication application. An identification of the communication application is also transmitted to the communication device for purposes of tracking its implementation.

Efficient software download to configurable communication device

A virtual machine interface for a separate reconfigurable wireless network communication apparatus comprising a plurality of software objects, wherein each software object is associated with a hardware kernel assigned to the reconfigurable wireless network communication apparatus, each software object configured such that a change in the software object results in a change in the hardware kernel associated with the software object. The virtual machine interface has information as to types and numbers of software objects and values associated with the software objects necessary to implement a selected wireless communication protocol.

Growing community of inventors

San Jose, CA, United States of America

Song Chen