Adeia Semiconductor Solutions LLC

Son V Nguyen

Stanton J Rowe

Larisa Dadonkin

Bella Felsen

Nik Gurovich

Netanel Benichou

Tamir Levi

David Maimon

Ziv Yohanan

Mark Chau

Alexander J Siegel

Erin Spinner

Neil Zimmerman

Kangguo Cheng

Juntao Li

Tenko Yamashita

Chanro Park

Sanjay C Mehta

Thomas J Haigh, Jr

Kevin D Rupp

Robert Schwartz

Eric G Liniger

Robert Van Tassel

Ajay Chadha

Jeff Lindstrom

Elena Sherman

Oren H Wintner

Ron Sharoni

Tamir S Levi

Semiconductor devices having air gap spacers that are formed as part of BEOL or MOL layers of the semiconductor devices are provided, as well as methods for fabricating such air gap spacers. For example, a method comprises forming a first metallic structure and a second metallic structure on a substrate, wherein the first and second metallic structures are disposed adjacent to each other with insulating material disposed between the first and second metallic structures. The insulating material is etched to form a space between the first and second metallic structures. A layer of dielectric material is deposited over the first and second metallic structures using a pinch-off deposition process to form an air gap in the space between the first and second metallic structures, wherein a portion of the air gap extends above an upper surface of at least one of the first metallic structure and the second metallic structure.

Air gap spacer formation for nano-scale semiconductor devices

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Schenectady, NY, United States of America

Son V Nguyen