International Business Machines Corporation

Son K Tran

David L Questad

Thomas Edward Lombardi

Michael A Gaynes

Luis Jesus Matienzo

Pierre M Langevin

Sri Muthuthamby Sri-Jayantha

Jeffrey Donald Gelorme

James L Speidell

Frank Louis Pompeo

William E Bernier

Marie-Claude Paquet

Donald Merte

Gregg B Monjeau

Robert P Kuder, Ii

Daniel J Littrell

Frank Daniel Egitto

William John Rudik

Ramesh R Kodnani

Michael B Vincent

Jean Dery

Luc Ouellet

Charles Ouellet

John Ulrich Knickerbocker

Bing Dang

Stefano Sergio Oggioni

Stephen L Buchwalter

Eric A Johnson

Mario John Interrante

Miguel Angel Jimarez

Irving Memis

Nancy C LaBianca

Charles F Carey

Marybeth Perrino

Robert F White

Eberhard B Gramatzki

Thomas R Homa

Tien Y Wu

Clément J Fortin

Mark Vincent Pierson

Cynthia Susan Milkovich

John E Kozol

Cl&eacute;ment J Fortin

Duane A Stanke

An interposer sandwich structure includes a top interposer and a bottom interposer enclosing an integrated circuit electronic device that includes an attachment for attaching the device to the bottom interposer, and an interconnection structure connecting the top interposer to the bottom interposer. The top interposer may also be directly connected to a chip carrier in addition to the bottom interposer. The structure provides shielding and protection of the device against Electrostatic Discharge (ESD), Electromagnetic Interference (EMI), and Electromagnetic Conductivity (EMC) in miniaturized 3D packaging.

Silicon interposer sandwich structure for ESD, EMC, and EMC shielding and protection

A interposer sandwich structure comprises a top interposer and a bottom interposer enclosing an integrated circuit electronic device that includes means for attaching the device to the bottom interposer, and an interconnection structure connecting the top interposer to the bottom interposer. The top interposer may also be directly connected to a chip carrier in addition to the bottom interposer. The structure provides shielding and protection of the device against Electrostatic Discharge (ESD), Electromagnetic Interference (EMI), and Electromagnetic Conductivity (EMC) in miniaturized 3D packaging.

An interconnect structure that includes a component circuit board containing a plurality of electrical components, and a wafer connector assembly. The wafer connector assembly includes a plurality of interconnect circuit boards that are in electrical connection with the components circuit board through a plurality of rows of solder joints, the plurality of interconnect circuit boards having a connection end including at least one contact. An adhesive is present structurally reinforcing at least a row of the solder joints that is proximate to the connection end of the plurality of interconnect circuit boards of the wafer assembly.

Method and apparatus for strain relieving surface mount attached connectors

A fixture assembly and method of forming a chip assembly is provided. The fixture assembly includes a first plate having an opening sized to accommodate a chip mounted on a laminate. The fixture assembly further includes a second plate mated to the first plate by at least one mechanical fastening mechanism. The fixture assembly further includes a space defined by facing surfaces of the first plate and the second plate and confined by a raised stepped portion of at least one of the first plate and the second plate. The space is coincident with the opening. The space is sized and shaped such that the laminate is confined within the space and directly abuts the stepped portion and the facing surfaces of the first plate and the second plate to be confined in X, Y and Z directions.

Fixture to constrain laminate and method of assembly

An electronic fabrication process and structure is provided for attaching discrete passive surface mount devices (SMD) to a substrate in a single step. A liquid noflow resin encapsulant containing flux material is dispensed between presoldered pads on a substrate. The SMD, having a pair of electrical contacts, is pressed into said encapsulant so that the electrical contacts make contact with said presoldered pads. Heat is applied to first activate said flux material and then reflow the solder on said presoldered pads to bond said SMD contacts to said presoldered pads. The reflow temperature is maintained for about 180 seconds during which time the resin solidifies. The resin encapsulant fills the space between substrate and SMD and forms fillets around the solder bonded contacts.

SMT passive device noflow underfill methodology and structure

A method and structure for coupling a semiconductor substrate (e.g., a semiconductor chip) to an organic substrate (e.g., a chip carrier). The coupling interfaces a solder member (e.g., a solder ball) to both a conductive pad on the semiconductor substrate and a conductive pad on the organic substrate. Thermal strains on the solder member during thermal cycling may be reduced by having a surface area of the pad on the semiconductor substrate exceed a surface area of the pad on the organic substrate. Thermal strains on the solder member during thermal cycling may also be reduced by having a distance from a centerline of the solder member to a closest lateral edge of the semiconductor substrate exceed about 0.25 mm.

Extension of fatigue life for C4 solder ball to chip connection

Reworkable thermally conductive adhesive composition including a cured reaction product from a diepoxide wherein the epoxy groups are connected through an acyclic acetal moiety, a cyclic anhydride and a thermally conductive filler are provided and used to bond semiconductive devices to a chip carrier or heat spreader.

Reworkable and thermally conductive adhesive and use thereof

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Endwell, NY, United States of America

Son K Tran