Texas Instruments Corporation

Somshubhra Paul

Kumar Anurag Shrivastava

Sreeram Subramanyam Nasum

Ruchi Shankar

Lokesh Kumar Gupta

Tarunvir Singh

Deep Banerjee

Gaurang Helekar

Bhaskar Ramachandran

Suresh Mallala

Srinivasan Venkataraman

Ameet Suresh Bagwe

A system includes a voltage regulator having an output voltage and a power management system, coupled to the voltage regulator. The power management system operable to determine whether the output voltage is within an active range, set the active range to a first range during a first time, or during a first mode, and set the active range to a second range for a second time, or during a second mode.

Voltage regulator wake-up

A driver includes an open drain output transistor, a capacitor, a first current source, and first and second transistors. Upon assertion of a transmit signal to turn on the first transistor, a controller asserts a second control signal to turn on the second transistor responsive to a voltage of the capacitor being less than a threshold voltage of the open drain output transistor to thereby increase the control terminal voltage for the open drain output transistor at a first time rate. The controller deasserts the second control signal to turn off the second transistor responsive to the capacitor voltage exceeding the threshold voltage. Responsive to the capacitor's voltage exceeding the threshold, the first current source charges the capacitor to further increase the control terminal voltage at a second time rate that is smaller than the first time rate.

Bus driver with rise/fall time control

A digital isolator comprising a set of bipolar transistors and an inductor capacitor (LC) oscillator coupled to the set of bipolar transistors in series, wherein the LC oscillator is configured to be turned on and off based on the current applied to the set of bipolar transistors or the LC oscillator and generate a set of differential signals based on the current flowing through the set of bipolar transistors and mimicking the operational characteristics of an optocoupler.

Optocoupler emulating input stage for digital isolators

A system includes a voltage regulator having an output voltage; a power management system, coupled to the voltage regulator, operable to continuously monitor the output voltage to determine whether the output voltage is within a range; and the power management system is operable to set the range to a normal range during normal operation, and is operable to increase the range beyond the normal range during a low power mode and during a wake-up period from a low power mode.

A driver includes an open drain output transistor, a capacitor, a first current source, and first and second transistors. Upon assertion of a transmit signal to turn on the first transistor, a controller asserts a second control signal to turn on the second transistor responsive to a voltage of the capacitor being less than a threshold voltage of the open drain output transistor to thereby increase the gate voltage for the open drain output transistor at a first time rate. The controller deasserts the second control signal to turn off the second transistor responsive to the capacitor voltage exceeding the threshold voltage. Responsive to the capacitor's voltage exceeding the threshold, the first current source charges the capacitor to further increase the gate voltage at a second time rate that is smaller than the first time rate.

For determining a power consumption of electrical circuitry, at least one device executes at least a portion of a software application having an effect on a current through the electrical circuitry. A current is generated through a transistor for mirroring the current through the electrical circuitry. In response to a control word, a reference current is generated. In response to executing the portion of the software application, the control word is varied to determine a value thereof that causes the reference current to approximately equal the current through the transistor, in a manner that correlates the effect of the portion of the software application on the current through the electrical circuitry.

Method and system for determining power consumption

Circuits and methods for providing short-circuit protection in a voltage regulator are disclosed. A voltage regulator includes a pass switch, a voltage error amplifier, a driver circuit, and a short-circuit protection circuit. The pass element is coupled to a power supply and a load, and generates an output voltage in response to a drive signal. The voltage error amplifier generates an error voltage based on a difference of a reference voltage and the output voltage and the driver circuit generates the drive signal in response to the error voltage. The short-circuit protection circuit senses the drive signal and provides a high-resistance path to the driver circuit in a short-circuit event. In a short-circuit event, the high-resistance path clamps current in the driver circuit thereby clamping a voltage difference between the first and third terminals and thereby limiting a load current in the short-circuit event.

Short-circuit protection for voltage regulators

A method for generating a reset signal in a system on a chip (SoC) is disclosed. A sense signal is generated responsive to a supply voltage provided to the SoC. A reset signal is asserted while the sense signal is below a threshold voltage level. The sense signal may be forced below the threshold value for a period of time determined by a first capacitive time constant circuit. Operation of the first capacitive time constant circuit is inhibited after the sense signal has been above the threshold value level for a second period of time as determined by a second capacitive time constant circuit responsive to the supply voltage. In some embodiments, the first capacitive time constant circuit and the second capacitive time constant circuit may be discharged when the supply voltage falls below a second threshold voltage level, such that the reset signal is again asserted.

Detection of fast supply ramp in reset circuit

A single sleep mode controller which ensures that there is at least a corresponding minimum voltage level across capacitors when the corresponding regulators are turned off. In an embodiment, the sleep mode controller uses a single comparator which compares the voltages across capacitors in a time division multiplexed (TDM) manner, and initiates the charging operation for the capacitor if the voltage level falls below a corresponding minimum voltage level. The sleep mode controller continues the charging operation until the voltage level exceeds a corresponding upper threshold value. Due to the use of the single controller, power and/or space savings may be attained.

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Bengaluru, India

Somshubhra Paul