National Institute of Advanced Industrial Science and Technology

Fujikoshi Machinery Corp.

Oriental Motor Co., Inc.

Litho Tech Japan Corporation

Sommawan Khumpuang

Shiro Hara

Shinichi Ikeda

Fumito Imura

Michihiro Inoue

Arami Saruwatari

Yoshio Nakamura

Yasuaki Yokoyama

Hitoshi Maekawa

Kazutaka Shibuya

Yoshio Otsuka

Takayuki Fuse

Yuuki Ishida

Haruo Sumizawa

Yoshihisa Sensu

Sonoko Matsuda

Takahiro Ito

Takanori Mikahara

Hitoshi Habuka

Akihiro Goto

Yoshiki Inuzuka

Hiroshi Amano

Daizo Ichikawa

Akio Kobayashi

Takashi Okubo

Shuuji Okuda

Takashi Yajima

Takeshi Umino

Sho Takeuchi

An encapsulated cleanroom system comprising a processing chamber and a storage section in which the processing chamber is stored, wherein, during operation, the pressure in the storage section is lower or higher than the pressures in the processing chamber and exterior space. The system can simultaneously prevent the entry of outside gases into its processing chamber and the leakage of the gases inside the processing chamber to the exterior space.

Encapsulated cleanroom system

A method of manufacturing a semiconductor package and a semiconductor package in which positional alignment between a wafer and a substrate until the wafer is mounted and packaged on the substrate is achieved accurately. A wafer is mounted on a package substrate by using first alignment marks and D-cuts as benchmarks, and then a mold resin layer is formed on the wafer in a state in which the first alignment mark is exposed. A part of the mold resin layer is removed by using the D-cuts exposed from the mold resin layer as benchmarks, so that the first alignment marks can be visually recognized. A second alignment marks are formed on the mold resin layer by using the first alignment marks as benchmarks. A Cu redistribution layer to be conducted to a pad portion is formed on a mold resin layer by using the second alignment marks as benchmarks.

Method of manufacturing semiconductor package using alignment mark on wafer

A treatment liquid supply device and a wet treatment device with which an extremely small quantity of the treatment liquid can be accurately supplied, as a method for supplying a treatment liquid to an extremely small wafer of half inch size, including: a syringe that sucks and discharges the treatment liquid; a treatment liquid bottle that is filled with the treatment liquid; a suction hose that has one end connected to the treatment liquid bottle and the other end connected to the syringe, and sucks the treatment liquid inside the treatment liquid bottle to the syringe; a supply hose that has one end connected to an intermediate section of the suction hose and serves to supply, to the surface of the wafer, the treatment liquid discharged by the syringe; and a three-way solenoid valve that controls opening/closing of each of the suction and supply hoses.

Treatment liquid supply device using syringe, and wet treatment device

A wafer cleaner and a method therefor that efficiently cleans a wafer with a little amount of a cleaning liquid and efficiently performs a heating wet cleaning processing. The present invention includes a stage where a wafer is placed, a rotary driving unit that rotates the stage in a circumferential direction, a liquid discharge nozzle disposed facing the wafer placed on the stage and supplies a cleaning liquid on the wafer placed on the stage, and a control unit that causes the liquid discharge nozzle to supply a space between the wafer placed on the stage and the liquid discharge nozzle with a predetermined amount of the cleaning liquid to fill the space. The present invention also includes a lamp disposed on a position facing the wafer placed on the stage to heat at least an interface portion of the wafer and a cleaning liquid.

Wet processing apparatus

A semiconductor manufacturing system has a series of steps, from manufacturing of a semiconductor on a wafer until packaging, that can be easily linked. A semiconductor chip manufacturing device manufactures a semiconductor chip, and a semiconductor packaging device packages the semiconductor chip by attaching the semiconductor chip to a package substrate which is larger than the wafer. The semiconductor chip manufacturing device includes a PLAD system for loading the wafer into and out of the semiconductor chip manufacturing device through a shuttle which is capable of housing the wafer. The semiconductor packaging device includes a PLAD system capable of loading the package substrate into and out of the semiconductor packaging device through a shuttle which is capable of housing the package substrate. The shuttles have container bodies of a same shape.

System for integrating preceding steps and subsequent steps

A columnar laminar flow generation device includes: a placement part on which to place a processing target; a gas blow-out part having an opening; and a gas suction path; wherein the placement part is positioned in a space whose outer periphery surface is constituted by extending the interior wall of the opening in the direction vertical to the opening; the opening has, in its interior wall, a gas blow-out port through which a gas is blown out in one direction vertical to the opening; and the gas suction path is formed in such a way that it suctions the gas in the direction opposite to the one in which the gas is blown out. The columnar laminar generation device is capable of generating columnar laminar flows.

Columnar laminar flow generation device and method for generating columnar laminar flows

To provide a crystal orientation mark which can be formed easily and inexpensively, and which enables to perform high precision alignment and allows information other than crystal orientation to be included, even for a small diameter process substrate. A crystal orientation mark is drawn on the surface of the process substrate. The crystal orientation mark includes a marking region for crystal orientation detection, and a marking region for information. The marking region for crystal orientation detection is provided at two locations in an outer edge portion of the process substrate to be used for the alignment of the process substrate. The marking region for information is provided on a straight-line region connecting the marking regions for crystal orientation detection at the two locations, and includes a pattern for demonstrating predetermined information relating to the process substrate.

Process substrate with crystal orientation mark, method of detecting crystal orientation, and reading device of crystal orientation mark

An object of the present invention is to provide a circular support substrate that allows for positioning based solely on its outer periphery shape. As a means for solving the problems, a circular support substrate is provided that has at least three chords along its circumference, wherein the chords are provided at positions where they do not run linearly symmetrical to the straight line passing through the center axis of the circular support substrate.

Circular support substrate for semiconductor

A method for manufacturing a surface-mount type package whose face parallel with the semiconductor chip surface has a circular cross-section, is characterized by including at least the following steps in this order: a first step in which a semiconductor chip is bonded onto a circular support substrate; a second step in which the semiconductor chip is sealed with resin; a third step in which the resin covering the pads of the semiconductor chip is removed; a fourth step in which a rewiring layer is formed; and a fifth step in which bumps are formed. The method can provide a surface-mount type package for semiconductor chips which is resistant to failures caused by thermal stress.

Surface mount package and manufacturing method thereof

Provide a converging mirror-based furnace for heating a target by way of reflecting from a reflecting mirror unit the light emitted from a light source and then irradiating a target with the reflected light, wherein said target-heating converging-light furnace is such that: the reflecting mirror unit comprises a primary reflecting mirror and secondary reflecting mirror; the light emitted from the light source is reflected sequentially by the primary reflecting mirror and secondary reflecting mirror and then irradiated onto the target; and the light reflected by the secondary reflecting mirror and irradiated onto the target surface is not perpendicular to the target surface. Based on the above, a system that uses converged infrared light to provide heating can be made smaller while keeping its heating performance intact, even when the system uses a revolving ellipsoid.

Converging mirror furnace

To provide a mask aligner that can appropriately manage very small-quantity production and multiproduct production. The present invention is a mask alignerthat exposes a wafer W in a predetermined size through a mask M, and has a configuration that includes: a conveying devicefor conveying the wafer W and the mask M; an exposure stageon which the wafer W conveyed by the conveying deviceis installed; a mask holderthat is mounted to face the exposure stageand on which the mask M conveyed by the conveying deviceis installed; and an LED light sourcemounted to face the exposure stagevia the mask holder

Exposure apparatus and exposure method

A method of manufacturing semiconductor wafers which facilitates formation of orientation flat lines and allows beveling work without problems. The method of manufacturing semiconductor wafers includes steps wherein a plurality of small-diameter wafers is cut out from a large-diameter semiconductor wafer, the method including: a marking step of forming straight groove-like orientation flat lines by a laser beam so as to cross the respective small-diameter wafers in each row in the large-diameter semiconductor wafer, wherein cutout positions of the small-diameter wafers are aligned in rows in a specific direction, collectively for each of the rows; and a cutting step of cutting out the small-diameter wafers separately from the large-diameter semiconductor wafer, by a laser beam, after the marking step, in such a way that the orientation flat lines are located at required positions in the small-diameter wafers to be obtained.

Method of manufacturing semiconductor wafers

The wafer polishing apparatus comprises a polishing plate, a polishing head capable of holding a wafer, and a slurry supplying section. The polishing plate includes: a plurality of concentric polishing zones, each of which has a prescribed width for polishing the wafer and on each of which a polishing cloth is adhered; and a groove for discharging slurry being formed between the polishing zones. A head cleaning section, which cleans the polishing head, or a wafer cleaning section, which cleans the polished wafer, is provided to a center part of the polishing plate and located on the inner side of the innermost polishing zone.

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Tsukuba, Japan

Sommawan Khumpuang