Violin Memory Inc.

Gridiron Systems, Inc.

Finisar Corporation

Synoptics Communications, Inc.

Bay Networks Group, Inc.

Shomiti Systems, Inc.

Som Sikdar

Erik De La Iglesia

Sivaram Dommeti

David Scott Parker

Gaurav Garg

Geoffrey O Thompson

Ayal Opher

Philip Kruzinski

Dommeti Sivaram

Chung Dai

Santosh Lolayekar

Garry Knox

Tor Sundsbarm

Steven Strong

Ross Becker

Peter Tarrant

A hardware search structure determines the status of cache lines associated with a large disk array and at the same time reduces the amount of memory space needed for tracking the status. The search structure is configurable in hardware to different cache line sizes and different primary and secondary index sizes. A maintenance feature invalidates state record entries based both on their time stamps and on associated usage statistics.

Mapping engine for a storage device

Cache lines are identified that provide incorrect data for read requests. The cache lines are invalidated before the incorrect data causes processing failure conditions. The cache lines providing incorrect data may be detected according to a number of the same read requests to the same cache lines. The cache lines may also be identified according to an amount of time between the same read requests to the same cache lines. The same read requests to the same cache lines may be identified according to associated start addresses and address lengths.

Identifying invalid cache data

A cluster of storage control members connect different clients to different storage disks. Connection path information between the different clients and disks is discovered and distributed to the storage cluster members. The connection path information is then used to maintain coherency between tiering media contained in the different storage cluster members. Unique Small Computer System Interface (SCSI) identifiers may be associated with the different connection paths to uniquely identify particular storage disks connected to the clients.

Cluster control protocol

A proxy manages write operations between devices that initiate write operations and one or more storage devices that store data for the write operations. A write log buffers the data for the write operations while the proxy waits for acknowledgments back from the storage device. The proxy is configured to copy at least some of the data from the write log into an overflow log when the data from the write operations is about to overflow the write log. The proxy device is further configured to maintain data consistency by delaying or blocking read operations until associated data from previously received write operations is acknowledged by the storage device.

Transactional consistency scheme

A storage system creates an abstraction of flash Solid State Device (SSD) media allowing random write operations of arbitrary size by a user while performing large sequential write operations of a uniform size to an SSD array. This reduces the number of random write operations performed in the SSD array and as a result increases performance of the SSD array. A control element determines when blocks from different buffers should be combined together or discarded based on fragmentation and read activity. This optimization scheme increases memory capacity and improves memory utilization and performance.

System for increasing utilization of storage media

A hardware search structure quickly determines the status of cache lines associated with a large disk array and at the same time reduces the amount of memory space needed for tracking the status. The search structure is configurable in hardware to different cache line sizes and different primary and secondary index sizes. A maintenance feature invalidates state record entries based both on their time stamps and on associated usage statistics.

A storage control system includes performance monitor logic configured to track performance parameters for different volumes in a storage array. Service level enforcement logic is configured to assign target performance parameters to the different volumes and generate metrics for each of the different volumes identifying how much the performance parameters change for the different volumes responsive to changes in the amounts of tiering media allocated to the different volumes. Resource allocation logic is configured to allocate the tiering media to the different volumes according to the performance parameters, target performance parameters, and metrics for the different volumes.

Dynamic performance virtualization for disk access

A storage control system monitors storage operations directed to storage blocks in a storage device. The storage control system uses arrays of counters to track a number of the storage operations, sizes of the storage operations, types of transitions between the storage operations, and time durations between different types of successive storage operations. The storage blocks are classified into different behavioral groups based on the access pattern history of the individual blocks. The behavioral group classifications are then used by the storage control system to determine when to access the storage blocks from the storage device, when to load the storage blocks into a tiering media, or when to time out the storage blocks from the tiering media.

Behavioral monitoring of storage access patterns

A system analyzes access patterns in a storage system. Logic circuitry in the system identifies different address regions of contiguously accessed memory locations. A statistical record identifies a number of storage accesses to the different address regions and a historical record identifies previous address regions accessed prior to the address regions currently being accessed. The logic circuitry is then used to prefetch data from the different address regions according to the statistical record and the historical record.

Storage device prefetch system using directed graph clusters

A fibre channel proxy proxies storage operations in a fibre channel storage network. A first set of fibre channel proxy ports are configured to receive storage operations from one or more initiators. A second set of fibre channel proxy ports are configured to forward the storage operations to one or more storage targets. Fibre channel port identifiers for the storage targets are used to communicate with the initiators during the storage operations over the first set of fibre channel proxy ports. Fibre channel port identifiers for the initiators are used to communicate with the storage targets during the storage operations over the second set of fibre channel proxy ports. This scheme allows the fibre channel to operate transparently in the fibre channel network.

Fibre channel proxy

A method for synchronizing a distributed system is provided. The distributed system includes distributed analyzers. Each analyzer has a synchronization decoder circuit, a medium access controller, and a central processing unit. The distributed system synchronization method comprises receiving multicast information, generating local synchronization signals, receiving control data packets, and beginning processing of monitored data packets. The synchronization decoder circuit receives the multicast information, decodes the multicast information, and responsive to the multicast information, generates local synchronization signals. The decoder synchronization circuit of a first analyzer completes the decoding and the generating in a first time. The first time is adapted to enable the central processing unit of the first analyzer to start and end processing of monitored data packets at a first start time and a first end time. The first start time differs from a start time corresponding to any other analyzer by less than a maximum synchronization time. The first end time differs from an end time corresponding to any other analyzer by less than a maximum synchronization time. The maximum synchronization time comprises a parameter related to a smallest useful packet size and a network speed. The medium access controller receives control data packets. Each control data packet corresponds to a data stream. The monitored data packets are transmitted in a data stream selected for monitoring. Responsive to the local synchronization signals and the control data packets, the central processing unit for each analyzer processes monitored data packets.

System, analyzer, and method for synchronizing a distributed system

System analyzer and method for synchronizing a distributed system

The present invention provides method of encoding an electronic memory; multiple digital values are prioritized; respective digital values are associated with respective memory locations of the electronic memory such that there are multiple memory locations each associated with two or more different digital values; and respective digital values are loaded into respective memory locations of the electronic memory in order from lowest priority digital value to highest priority digital value wherein each respective digital value is loaded into all respective memory locations that are associated with such respective digital value.

Method and apparatus to apply prioritization policy in electronic systems

A method and approach for providing improved performance in a CSMA/CD-type network utilizing transmission of block encoded congestion sense signaling to allow full duplex transmission of data over a communication link segment. In addition, the method and apparatus for providing in-band signaling of congestion conditions is described. The improved method and apparatus are implemented with minimal changes to existing standards and allow for compatibility, above the MAC sublayer, with existing installed hardware and software bases.

Congestion sense controlled access for a star configured network

A data communications network providing for a multiport router and providing for use of an asynchronous transfer mode (ATM) switch or the like as a routing backplane or packet switching engine. A router front end formats ATM cells including providing routing information in the cell header. The routing information may comprise, for example, a destination port identifier in the VPI field of the cell header. The ATM switch then switches the cell from an input port, coupled with the router front end to an output port based on the routing information. The ATM switch may also translate the routing information to provide source identification information to the destination. In a described embodiment, the multiport router is used as a backplane bus in a network concentrator.

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San Jose, CA, United States of America

Som Sikdar