Samsung Electronics Co., Ltd.

Seoul National University

Soichiro Mizusaki

Seyun Kim

Jinhong Kim

Youngjin Cho

Doyoon Kim

Jungho Yoon

Hajin Kim

Haengdeog Koh

Changsoo Lee

Minjong Bae

Yumin Kim

Hiesang Sohn

Cheol Seong Hwang

Taehun Kim

Sang Heon Lee

Kwangseok Kim

Won Suk Chang

In Taek Han

Intaek Han

Jeongchun Ryu

DoYoon Kim

Atsushi Okada

Kunwoo Choi

Disclosed are a spin orbit torque (SOT) magnetic memory device, an operating method thereof, and an electronic apparatus including the SOT magnetic memory device. The SOT magnetic memory device includes a first SOT layer, a magnetic tunnel junction (MTJ) layer on one surface of the first SOT layer, and an SOT-based local magnetic field generation layer to cross the first SOT layer and including a generating region configured to generate a magnetic field that reaches the MTJ layer; and an upper electrode layer disposed to face the first SOT layer with the MTJ layer therebetween and in contact with the MTJ layer. The SOT magnetic memory device includes five operating terminals.

Spin orbit torque magnetic memory devices, operating methods thereof, and electronic apparatuses including the magnetic memory devices

A variable resistance memory device includes a variable resistance layer, a first conductive element, and a second conductive element. The variable resistance layer includes a first layer including a first material and a second layer on the first layer and the second layer including a second material. The second material has a different valence than a valence of the first material. The first conductive element and the second conductive element are on the variable resistance layer and separated from each other to form an electric current path in the variable resistance layer in a direction perpendicular to a direction in which the first layer and the second layer are stacked.

Variable resistance memory device

A semiconductor device is provided. The semiconductor device includes a substrate a substrate, a first electrode structure on the substrate, the first electrode structure including first insulating patterns and first electrode patterns, the first insulating patterns alternately stacked with the first electrode patterns, a second electrode pattern on a sidewall of the first electrode structure, and a data storage film on a sidewall of the second electrode pattern. The data storage film has a variable resistance.

Semiconductor device and method of manufacturing the same

A variable resistance memory device includes a variable resistance layer and a first conductive element and a second conductive element which are spaced apart from each other on the variable resistance layer. The variable resistance layer may include a first layer and a second layer on the first layer. The first layer includes a ternary or more metal oxide containing two or more metal materials having different valences. The second layer may include silicon oxide. The variable resistance memory device may have a wide range of resistance variation due to the metal oxide in which oxygen vacancies are easily formed. The first conductive element and the second conductive element, in response to an applied voltage, may be configured to form a current path in a direction perpendicular to a direction in which the first layer and the second direction are stacked.

A heating element includes a plurality of matrix particles and a conductive inorganic filler disposed at interfaces between the plurality of matrix particles to provide a conductive network.

Heating element, manufacturing method thereof, composition for forming heating element, and heating apparatus

A nonvolatile memory device and an operating method thereof are provided. The nonvolatile memory device includes a memory cell array including first to third memory cells sequentially arranged in a vertical stack structure and a control logic configured to apply a first non-selection voltage to the first memory cell, apply a second non-selection voltage different from the first non-selection voltage to the third memory cell, apply a selection voltage to the second memory cell, and select the second memory cell as a selection memory cell.

Nonvolatile memory device and operating method of the same

A memory device may include an insulating structure including a first surface and a protrusion portion protruding from the first surface in a first direction, a recording material layer on the insulating structure and extending along a protruding surface of the protrusion portion to cover the protrusion portion and extending onto the first surface of the insulating structure, a channel layer on the recording material layer and extending along a surface of the recording material layer, a gate insulating layer on the channel layer; and a gate electrode formed on the gate insulating layer at a location facing a second surface of the insulating structure. The second surface of the insulating structure may be a protruding upper surface of the protrusion portion.

Memory device and method of manufacturing the same

A vertical nonvolatile memory device including a memory cell string using a resistance change material is disclosed. Each memory cell string of the nonvolatile memory device includes a semiconductor layer extending in a first direction and having a first surface opposite a second surface, a plurality of gates and a plurality of insulators alternately arranged in the first direction and extending in a second direction perpendicular to the first direction, a gate insulating layer extending in the first direction between the plurality of gates and the semiconductor layer and between the plurality of insulators and the semiconductor layer, and a dielectric film extending in the first direction on the surface of the semiconductor layer and having a plurality of movable oxygen vacancies distributed therein.

Vertical nonvolatile memory device including memory cell string

A variable resistance memory may include first and second conductive elements spaced apart from each other on a variable resistance layer. The variable resistance layer may include first to third oxide layers sequentially arranged in a direction perpendicular to a direction in which the first and second conductive elements are arranged. A dielectric constant of the second oxide layer may be greater than dielectric constants of the first and third oxide layers.

Disclosed are a memory device including a vertical stack structure and a method of manufacturing the memory device. The memory device includes an insulating structure having a shape including a first surface and a protrusion portion protruding in a first direction from the first surface, a recording material layer covering the protrusion portion along a protruding shape of the protrusion portion and extending to the first surface on the insulating structure a channel layer on the recording material layer along a surface of the recording material layer, a gate insulating layer on the channel layer, and a gate electrode formed at a location on the gate insulating layer to face a second surface which is a protruding upper surface of the protrusion portion, wherein a void exists between the gate electrode and the insulating structure, defined by the insulating structure and the recording material layer.

Memory device including vertical stack structure and method of manufacturing the same

A nonvolatile memory device and a method of operating the same are provided. The nonvolatile memory device may include a memory cell array having a vertical stack-type structure, a control logic, and a bit line. The memory cell array may include memory cells that each include corresponding portions of a semiconductor layer and a resistance change layer. The control logic, in a read operation, may be configured to apply a first voltage to a non-select memory cell and a second voltage to a non-select memory cell. The first voltage turns on current only in the semiconductor layer portion of the non-select memory cell. The second voltage turns on current in both the semiconductor layer and resistance change layer portions of the select memory cell. The bit line may be configured to apply a read voltage to the select memory cell during the read operation.

Nonvolatile memory device with vertical string including semiconductor and resistance change layers, and method of operating the same

A variable resistance memory device includes a variable resistance layer, a first conductive element, and a second conductive element. The variable resistance layer includes a first layer and a second layer. The first layer is formed of a first material. The second layer is on the first layer and formed of a second material having a density different from a density of the first material. The first conductive element and a second conductive element are located on the variable resistance layer and spaced apart from each other in order to form a current path in the variable resistance layer. The current path is in a direction perpendicular to a direction in which the first layer and the second layer are stacked.

Growing community of inventors

Suwon-si, South Korea

Soichiro Mizusaki