Mitsubishi Electric Corporation

Mitsubishi Electric Cooperation

Soichi Sakamoto

Junji Fujino

Shohei Ogawa

Hiroshi Kawashima

Taketoshi Maeda

Mikio Ishihara

Katsumi Miyawaki

Yutaka Yoneda

Hiroaki Ichinohe

Tatsunori Yanagimoto

Yoshihisa Uchida

Miho Nagai

The present invention provides a semiconductor device including an insulating layer, a conductive layer bonded to one main surface of the insulating layer, a semiconductor element arranged such that the upper surface of the semiconductor element faces a direction same as the one main surface of the insulating layer, an upper electrode provided on the upper surface of the semiconductor element, a wiring member that has one end electrically bonded to the upper electrode of the semiconductor element and has another end electrically bonded to the conductive layer, and has a hollow portion, a first sealing material, and a second sealing material, in which the first sealing material seals at least part of the semiconductor element so as to be in contact with the semiconductor element, and the second sealing material seals the wiring member so as to be in contact with the wiring member.

Packaging of a semiconductor device with dual sealing materials

A semiconductor package includes: an insulating substrate; a first semiconductor chip; a second semiconductor chip with a thickness smaller than a thickness of the first semiconductor chip; a heat radiation member in which a main surface located on an opposite side of an active surface of the first semiconductor chip and an active surface of the second semiconductor chip, respectively, are bonded to a lower surface; and a sealing resin having contact with at least part of a side wall of the heat radiation member without being raised over an upper surface of the heat radiation member to seal the first and second semiconductor chips on the insulating substrate, wherein in the heat radiation member, a thickness of a first bonding part to which the first semiconductor chip is bonded is smaller than a thickness of a second bonding part to which the second semiconductor chip is bonded.

Semiconductor package comprising a heat dissipation structure and an outer peripheral frame used as a resin flow barrier

A power module of the invention includes a power semiconductor element mounted on a circuit board, and an adapter connected to a front-surface main electrode of the element, wherein the adapter includes a main-electrode wiring member which is connected to the front-surface main electrode of the element; and wherein the main-electrode wiring member includes: an element connection portion connected to the front-surface main electrode of the element; a board connection portion which is placed outside the element connection portion and connected to the circuit board; and a connector connection portion which is placed outside the element connection portion and connected to an external electrode through a connector.

Power module

An electrode terminal includes: a first drawn-out part to be bonded to a main electrode; and a second drawn-out part that is formed of a plate member in a continuous fashion from one end portion to be positioned opposite to the main electrode with a gap therebetween until another end portion to be connected to an external circuit, so that a portion in the first drawn-out part that is adjacent to a portion therein to be bonded to the main electrode, is bonded to an opposing surface to the main electrode in said one end portion; wherein the first drawn-out part is formed so that the portion to be bonded to the main electrode is away from the opposing surface; and wherein an opening portion corresponding to the main electrode is formed in the second drawn-out part.

Electrode terminal, semiconductor device for electrical power, and method for manufacturing semiconductor device for electrical power

A power module is fabricated, employing a clad metal that is formed by pressure-laminating aluminum and copper, in such a manner that the aluminum layer of the clad metal is bonded such as by ultrasonic bonding to the surface electrode of the power semiconductor chip and a wire is bonded to the copper layer thereof to establish electrical circuit. The clad metal is thermally treated in advance at a temperature higher than the operating temperature of the power semiconductor chip to sufficiently form intermetallic compounds at the interface between the aluminum layer and the copper layer for the intermetallic compounds so as not to grow in thickness after the bonding processes.

Growing community of inventors

Tokyo, Japan

Soichi Sakamoto