Nxp B.v.

Nexperia B.v.

Soenke Habenicht

Stefan Berglund

Chi Ho Leung

Steffen Holland

Seong-Woo Bae

Olrik Schumacher

Wai Hung William Hor

Pompeo V Umali

Tim Boettcher

Heinrich Zeile

Yee Wai Fung

Detief Oelgeschlaeger

Ansgar Thorns

Detlef Oelgeschlager

WaiKeung Ho

Joachim Stange

Ke Xue

San Ming Chan

Michael Felix Konejung

Martin Roever

Wai Keung Ng

A semiconductor device () comprising: a doped semiconductor substrate (); an epitaxial layer (), disposed on top of the substrate, the epitaxial layer having a lower concentration of dopant than the substrate; a switching region disposed on top of the epitaxial layer; and a contact diffusion () disposed on top of the epitaxial layer, the contact diffusion having a higher concentration of dopant than the epitaxial layer; wherein the epitaxial layer forms a barrier between the contact diffusion and the substrate.

Semiconductor device

The disclosure relates to solid state relay circuit for switching an electrical load. The solid state relay circuit may include a relay transistor; and a driver circuit comprising a constant current source. The driver circuit is configured and arranged to switchably operate the relay transistor, and the relay transistor is configured and arranged to switchably operate the electrical load.

Solid state relay

This disclosure relates to a semiconductor device structure and method of manufacturing a semiconductor device. The semiconductor device structure comprises a semiconductor substrate having an edge region laterally separated from a device region; an edge termination structure arranged on the semiconductor substrate; wherein the edge termination structure comprises: a first oxide layer arranged on the substrate to extend from the active region to the edge region; an isolation layer arranged on top of the first oxide layer; and a metal layer arranged to at least partially cover the isolation layer and wherein the metal layer is further arranged to extend from the isolation layer to contact the edge region.

Semiconductor device structure and method of manufacture

A semiconductor device and a method of making the same is provided. The device includes a semiconductor substrate having a major surface and a back surface. The device also includes a bipolar transistor. The bipolar transistor has a collector region located in the semiconductor substrate; a base region located within the collector region and positioned adjacent the major surface; an emitter region located within the base region and positioned adjacent the major surface; and a collector terminal located on the major surface of the semiconductor substrate. The collector terminal includes: a first electrically conductive part electrically connected to the collector region; an electrically resistive part electrically connected to the first electrically conductive part, and a second electrically conductive part for allowing an external electrical connection to be made the collector terminal. The second conductive part is electrically connected to the first conductive part via the resistive part.

The present invention provides a semiconductor with a multilayered contact structure. The multilayered structure includes a metal contact placed on an active region of a semiconductor and a metal contact extension placed on the metal contact.

Semiconductor device with multilayer contact and method of manufacturing the same

A method of forming semiconductor devices on a leadframe structure. The leadframe structure comprising an array of leadframe sub-structures each having a semiconductor die arranged thereon. The method comprises; providing electrical connections between terminals of said lead frame sub-structures and said leadframe structure; encapsulating said leadframe structure, said electrical connections and said terminals in an encapsulation layer; performing a first series of parallel cuts extending through the leadframe structure and the encapsulation layer to expose a side portion of said terminals; electro-plating said terminals to form metal side pads; and performing a second series of parallel cuts angled with respect to the first series of parallel cuts, the second series of cuts extending through the lead frame structure and the encapsulation layer to singulate a semiconductor device from the leadframe structure.

Leadless semiconductor package and method

Consistent with an example embodiment, there is leadless packaged semiconductor device having top and bottom opposing major surfaces and sidewalls extending there between. The leadless packaged semiconductor device comprises a lead frame sub-assembly having an array of two or more lead frame portions each having a semiconductor die arranged thereon. There are at least five I/O terminals wherein each of said terminals comprise a respective metal side pad wherein the respective metal side pad is disposed in a recess. A feature of this embodiment is that the each of the side pads is electroplated. The electroplated side pads accept solder and the solder menisci are contained by the recesses.

Package with multiple I/O side-solderable terminals

A substrate for an electronic circuit is provided wherein the substrate comprises a plurality of contact areas (), a plurality of dielectric areas (), and a conductor path (), wherein each of the plurality of contact areas is surrounded by a respective one of the dielectric areas, and wherein at least two of the contact areas are connected with each other by the conductor path. Furthermore, the conductor path is formed at the dielectric area in such a way that it completely covers the dielectric area.

Contact structure for an electronic circuit substrate and electronic circuit comprising said contact structure

Conductions and vias between different, stacked metallic layers of a semiconductor device may be mechanically damaged by mechanical strain. According to an exemplary embodiment of the present invention, this mechanical strain may be transferred through the layer structure to the substrate by a grid of grounding structures and isolation and passivation layers which are connected by the grounding structures. This may provide for an enhancement of the lifetime of the semiconductor devices.

Growing community of inventors

Hamburg, Germany

Soenke Habenicht