Samsung Electronics Co., Ltd.

Samsung Display Co., Ltd.

So-Woon Kim

Sung-hoon Yang

Chong-Chul Chai

Soo-Wan Yoon

Yeon-Ju Kim

Chang-Oh Jeong

Je-Hun Lee

Kyoung-Ju Shin

Kangmoon Jo

Ansu Lee

Jung-Hyeon Kim

Joo-Ae Youn

Eun-Guk Lee

Tae-Hyung Hwang

Mun-Soo Park

Jungbae Song

So-Hyun Lee

Kwang-Hoon Lee

Donghun Lee

Unbyoll Ko

Chang-Hyeon Shin

Yeon-joo Kim

A display device is disclosed that includes a base substrate in which a first pixel area, a second pixel area, a third pixel area, and a light blocking area are defined. First, second, and third emission elements are disposed on the base substrate in the first, second, and third pixel areas, respectively. A color conversion layer includes a first color conversion pattern, a second color conversion pattern, and a light transmission pattern disposed on the first, second, and third emission elements, respectively. A color filter layer includes first, second, and third color filters disposed on the first color conversion pattern, the second color conversion pattern, and the light transmission pattern, respectively. The second pixel area is spaced apart from the first pixel area by a first interval. The third pixel area is spaced from the first pixel area by a second interval smaller than the first interval. The third pixel area is spaced from the second pixel area by a third interval larger than the second interval. The light blocking area surrounds each of the first, second, and third pixel areas.

Display device

A display device may include first and second base substrates, a pixel, a signal line, a pad electrode, and an electronic circuit connected to the pad electrode. The first base substrate includes a first planar surface and a first side surface, which is connected to the first planar surface and extends in a first direction. The second base substrate includes a second planar surface, which is disposed to face the first planar surface in a second direction crossing the first direction, and a second side surface, which is connected to the second planar surface and extends in the second direction. The pixel is disposed between the first and second base substrates. The signal line is disposed on the first base substrate and connected to the pixel. The pad electrode is disposed on the first side surface and connected to the signal line.

Display device having an inclined side surface

A liquid crystal display according to an exemplary embodiment of the present invention includes: a substrate; a plurality of gate lines and a plurality of data lines disposed at a display area; a data driver; and a plurality of driver connection lines disposed at a peripheral area and connecting the plurality of data lines and the data driver, wherein the plurality of driver connection lines include a plurality of first connection portions connected to the plurality of data lines, a plurality of second connection portions connected to the data driver, and a plurality of oblique line portions disposed between the plurality of first connection portions and the plurality of second connection portions, and an imaginary line connecting a plurality of direction change portions disposed at a boundary portion between the plurality of second connection portions and the plurality of oblique line portions does not have a straight line.

Display device having connection lines connected between a data driver and data lines

A method for removing noise of a gate signal that is outputted from a gate driving circuit including a plurality of stages, the method includes electrically connecting two terminals of two adjacent stages that have noise components opposite in phase to each other during a first period, and electrically disconnecting the two terminals of the two adjacent stages that have the noise components opposite in phase to each other during a second period.

Method for removing noise, switching circuit for performing the same and display device having the switching circuit

A fan-out unit which can control a resistance difference among channels with efficient space utilization and a thin-film transistor (TFT) array substrate having the fan-out unit are presented. The fan-out unit includes: an insulating substrate; a first wiring layer which is formed on the insulating substrate and connected to a pad; a second wiring layer which is formed on the insulating substrate and connected to a TFT; and a resistance controller which is connected between the first wiring layer and the second wiring layer and includes a plurality of first resistors extending parallel to the first wiring layer and a plurality of second resistors extending perpendicular to the first resistors and alternately connecting to the first resistors, wherein the first resistors are longer than the second resistors.

Fan-out unit and thin-film transistor array substrate having the same

A display substrate having a fan-out and a method for manufacturing the display substrate are disclosed. The fan-out includes an insulating substrate, a first line, a second line, a resistance control pattern, and first and second detour pattern. The first line is disposed on the insulating substrate and is connected to a pad. The second line is formed from the same layer as the first line and is connected to a thin-film transistor (TFT). The resistance control pattern is formed from a different layer than the first and second lines. The first and second detour patterns are formed from a different layer than the first and second lines and the resistance control pattern, and connect the first and second lines with the resistance control pattern, respectively.

Fan-out, display substrate having the same and method for manufacturing the display substrate

A display substrate includes respective pluralities of gate lines, data lines, switching elements, storage lines, pixel electrodes, and an organic insulation layer. The gate lines and the data lines define a plurality of unit pixels. The storage lines are respectively formed adjacent to the respective drain electrodes of the respective switching elements of respective rows of the unit pixels. The organic insulation layer has a hole that is formed within the area of each of the unit pixels and that extends from a contact area formed at a portion of the corresponding drain electrode of the pixel to a portion corresponding to the storage line thereof. This arrangement enables the marginal area needed to prevent mismatch of the hole in the areas of the contact area and the storage line to be reduced, thereby increasing the aperture ratio of the display.

LCD aperture ratios

A thin film transistors (TFTs) substrate is structured to maintain as constant across the area of the substrate a kickback voltage due to Miller capacitance between the drain and gate of each TFT even in the presence of manufacturing induced misalignments between the drain electrodes and corresponding gate lines. Each thin film transistor includes a gate electrode, an active layer formed on the gate electrode so as to overlap the gate electrode, first and second source electrodes respectively connected to first and second data lines each of which crosses the gate line while being insulated from the gate line, and an elongated drain electrode located between the first and second source electrodes and disposed over the gate electrode so as to a crossing length of the drain electrode is larger than an underlying width of the gate electrode such that misalignment induced shifts of the position of the gate electrode relative to the drain electrode does not substantially change overlap area between the two.

Thin film transistor substrate having structure for compensating for mask misalignment

Growing community of inventors

Suwon-si, South Korea

So-Woon Kim