Taiwan Semiconductor Manufacturing Comp. Ltd.

So-Wen Kuo

Chih-Hao Chang

Lin-June Wu

Li-Huan Chu

Yung Jung Chang

Chin-Shan Hou

A method for stripping an ion implanted photoresist layer from a substrate. There is first provided a substrate. There is then formed over the substrate an ion implanted photoresist layer. There is then treated the ion implated photoresist layer with a first plasma employing a first etchant gas composition comprising a fluorine containing species to form a fluorine plasma treated ion implanted photoresist layer. Finally, there is then stripped from the substrate the fluorine plasma treated ion implanted photoresist layer with a second plasma employing a second etchant gas composition comprising an oxygen containing species without the fluorine containing species. The ion implanted photoresist layer is stripped from the substrate without plasma induced damage to the substrate. The method is particularly useful for stripping from semiconductor substrates ion implanted patterned photoresist layers employed in forming ion implant regions within those semiconductor substrates prior to thermally oxidizing those semiconductor substrates to form thermal silicon oxide layers upon those semiconductor substrates.

Plasma method for stripping ion implanted photoresist layers

A method for forming a metal oxide semiconductor field effect transistor (MOSFET). There is first provided a semiconductor substrate. There is then formed upon the semiconductor substrate a gate dielectric layer. There is then formed upon the gate dielectric layer a gate electrode. There is then implanted into the semiconductor substrate while employing the gate electrode as a mask a pair of unactivated source/drain regions at a pair of opposite edges of the gate electrode, where the gate dielectric layer, the gate electrode and the pair of unactivated source/drain regions form an unactivated metal oxide semiconductor field effect transistor (MOSFET). There is then annealed thermally through a first thermal annealing method the semiconductor substrate to form from the pair of unactivated source/drain regions a pair of activated source/drain regions, where the gate dielectric layer, the gate electrode and the pair of activated source/drain regions form an activated metal oxide semiconductor field effect transistor (MOSFET). Finally, there is then annealed thermally through a subsequent second thermal annealing method the semiconductor substrate to form from the activated metal oxide semiconductor field effect transistor (MOSFET) a hot carrier effect (HCE) resistant activated metal oxide semiconductor field effect transistor (MOSFET).

Multiple thermal annealing method for a metal oxide semiconductor field

A method of forming buried contact holes is described. A layer of silicon oxide is provided overlying a semiconductor substrate. A layer of polysilicon is deposited overlying the silicon oxide layer. The polysilicon layer is covered with a layer of photoresist which is exposed and developed to provide a photoresist mask. The polysilicon layer is etched away where it is not covered by the photoresist mask wherein a polymer buildup is formed on the sidewalls of the polysilicon layer. Ions are implanted into the silicon oxide layer not covered by the photoresist mask. The photoresist mask is removed whereby the polymer buildup is also removed. Thereafter, the silicon oxide layer not covered by the polysilicon layer is etched away to complete the formation of the buried contact hole with reduced polymer buildup in the fabrication of an integrated circuit.

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Hsin-Chu, Taiwan

So-Wen Kuo