Expedera, Inc.

Zettacom, Inc.

Siyad Ma

Shang-Tse Chuang

Robert James Divivier

Sharad Vasantrao Chole

Toan D Tran

Artificial intelligence is an extremely computationally intensive field such that it can be expensive, time consuming, and energy consuming. Fortunately, many of the calculations required for artificial intelligence can be performed in parallel such that specialized processors can greatly increase computational performance. Specifically, artificial intelligence generally requires large numbers of matrix operations to implement neural networks such that specialized matrix processor circuits can improve performance. To perform all these matrix operations, the matrix processor circuits must be quickly and efficiently supplied with data to process or else the matrix processor circuits end up idle or spending large amounts of time loading in different weight matrix data. Thus, apparatus and methods are provided for efficiently operating external interfaces on neural network processors that efficiently interleave and overlap external memory operations along with computation operations such that both the external interface and matrix processor circuits are used efficiently.

Methods and apparatus for accessing external memory in a neural network processing system

A traffic manager for a network switch port includes a buffer memory and a buffer manager for writing incoming cells into the buffer memory and for thereafter reading the cells out of the buffer memory and forwarding them. The traffic manager also includes a queue manager for determining an order in which the buffer manager is to forward a set of cells stored in the buffer memory. The queue manager supplies the buffer manager with a sequence of pointers, each pointer referencing a separate cell of the set of cells, with the sequence of pointers being ordered to indicate an order in which the buffer manager is to forward the set of cells. After receiving the pointer sequence, the buffer manager changes the order of pointers in the pointer sequence to optimize a rate at which it can read the cells out of the buffer memory. The buffer manager reads the cells out of the buffer memory in an order indicated by the changed pointer sequence and thereafter forwards the cells read out of the buffer memory in the order in which the queue manager determined the cells are to be forwarded.

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Palo Alto, CA, United States of America

Siyad Ma