Intel Corporation

Siva Ramakrishnan

Ioannis T Schoinas

David I Poisner

Stephen H Gunther

Devadatta V Bodas

Shivnandan D Kaushik

Jeffrey R Wilcox

Lance E Hacking

Shahar Porat

Songnan Yang

Tod F Schiff

Emily B Cooper

Yuval Bachrach

Brian Leete

Reed D Vilhauer

Sreenivas Kasturi

Yuval Elad

Bernard Lint

Siddhartha Nath

Kristine M Karnos

Sanjiv Soman

Zeev Oster

Isaac Sever

Karim H Tadros

Techniques of load modulation are described herein. A wireless power transmitting unit may include a resonator to periodically transmit a short beacon having a first time period. The wireless power transmitting unit also includes circuitry coupled to the resonator. The circuitry is configured to detect a load change in the resonator when transmitting the short beacon and cause the resonator to transmit a long beacon subsequent to said transmitting the short beacon if said load change is detected. The long beacon has a second time period longer than the first time period.

Wireless load modulation

Systems and methods for power distribution allocation are provided. A system may establish a first wireless connection between the system and a first mobile device. The system may receive a first power request from the first mobile device, the first power request associated with a first minimum energy charge of the first mobile device, and may determine an available charging capacity of the charging system. The system may determine a first energy charge to provide wirelessly to the first mobile device, and may establish a second wireless connection with a second mobile device. The system may receive a second power request from the second mobile device, and may receive a first charge indicator from the first mobile device associated with a present charging status of the first mobile device. The system may determine a second energy charge to provide wirelessly to the second mobile device.

Systems and methods for wireless power distribution allocation

Methods and apparatus relating to a programmable scalable voltage translator are described. In one embodiment, logic translates an input voltage level into a plurality of output voltage levels during a low power consumption state of a device. Other embodiments are also disclosed and claimed.

Programmable scalable voltage translator

Some demonstrative embodiments include apparatuses, systems and/or methods of wireless power transfer. For example, a Wireless Power Receiver (WPR) may include a rectifier to convert a wireless charging signal received from Wireless Power Transmitter (WPT into a Direct Current (DC) power signal; a voltage regulator to regulate a voltage of the DC power signal according to a voltage range; a bypass path to bypass the voltage regulator; and a bypass controller to select between directing the DC power signal to the voltage regulator or to the bypass path, based on a voltage level of the DC power signal and the voltage range.

Apparatus, system and method of wireless power transfer

Techniques for powering up a wireless power receiving device are described herein. An example computing device includes a power receiving unit to wirelessly receive power from a power transmitting unit. The platform hardware includes a System on a Chip (SoC), a multicomm device, and a power sequence manager. The multicomm device is for wireless communication with two or more communication standards. One of the communication standards is used as a side channel for communicating with the power transmitting unit. The power sequence manager component manages activation of platform components of the platform hardware during a low battery cold boot condition. Upon detecting wireless power, the multicomm device is configured to automatically activate and the power sequence manager component is to suppress activation of other platform components of the platform hardware.

Powering up a wireless power receiving device

A multi-level storage apparatus includes a first-level storage area to store first information, a second-level storage area to store second information, and a selectively enabled third-level storage area to store information based on different operational states. The third-level storage area stores the first information from the first-level storage area when the third-level storage area is to change from a first state to a second state. The first information in third-level storage area is transferred to the first-level storage area when the third-level storage area is to change from the second state to the first state. The first information is to include page miss information.

Multi-level storage apparatus

An electronic data tablet has a controller and transition manager. The controller is to store in a memory of the tablet virtual configuration space information for a peripheral device of a computer, and the transition manager is to control the controller to operate in a first mode and a second mode. The virtual configuration space information is stored in the tablet memory when the first mode is to be switched to the second mode. When the second mode is switched to the first mode, the virtual configuration space information is accessed to control recognition of the peripheral device of the computer without performing a re-scanning operation.

System and method for generating a virtual PCI-type configuration space for a device

In one embodiment, a system includes a main memory including a compression cache to store uncompressed data, where the compression cache is organized as a sectored cache having on-die associated tags. On a tag match to an associated tag, a hit signal is sent to a memory controller coupled to the main memory to schedule an uncompressed data access from the compression cache. A compressed memory may be present to store a plurality of compressed data. Also, a higher priority may be assigned to read operations of the compressed memory in comparison to other operations to the compressed memory. Other embodiments are described and claimed.

Method, system, and apparatus for memory compression with flexible in-memory cache

Methods and apparatuses for coordination of power state management in and electronic system.

Power state coordination between devices sharing power-managed resources

Systems and methods of managing power provide for receiving notification of a pending power state transition and using coordination hardware to determine whether the power state transition in a primary device is permitted by a set of secondary devices. In one embodiment, the primary device shares a resource with the set of secondary devices.

Hardware coordination of power management activities

In some embodiments, a comparator compares an incoming memory address with a memory address currently being copied by a memory copy operation. A holding buffer holds the incoming address prior to forwarding it to a memory read/write queue if the incoming memory address is the same as the memory address currently being copied by the memory copy operation, forwards the buffered incoming memory address to the read/write queue once the memory copy operation for the memory address currently being copied has finished. Other embodiments are described and claimed.

Synchronizing memory copy operations with memory accesses

In some embodiments, a memory transaction is received that was sent over an unordered interconnect. A determination is made as to whether an address conflict exists between the memory transaction and another memory transaction. If the address conflict exists the memory transaction is forwarded only after waiting until the conflict is resolved. Other embodiments are described and claimed.

Growing community of inventors

Beaverton, OR, United States of America

Siva Ramakrishnan