Mediatek Corporation

Siou-Shen Lin

Te-Hao Chang

Chin-Chuan Liang

Hung Hui Ho

Wei-Jen Chen

Chien-Chung Chen

Hung-Der Lin

Wen-Chang Chang

Ching-hsiang Liao

An integrated circuit capable of video processing and a method thereof is disclosed. The integrated circuit comprises an image information generator, an adaptive motion vector (MV) candidate generator, and a block matching unit. The image information generator receives reference and current video data to determine image information. The adaptive MV candidate generator, coupled to the image information generator, receives the reference and current video data to generate spatial and temporal MV candidates, and generates an updated MV candidate based on the image information. The block matching unit, coupled to the adaptive MV candidate generator, receives the spatial and temporal MV candidates and the updated MV candidate and performs block matching to determine an output MV therefrom.

Method and integrated circuit for video processing

A method for generating an interpolated frame includes: calculating a temporal matching difference corresponding to a target motion vector of a current block by performing a motion estimation on the current block; deriving a spatial relationship result according to the target motion vector and motion vectors corresponding to a plurality of neighboring image blocks; and deriving the interpolated frame according to the target motion vector, the spatial relationship result, and the temporal matching difference.

Method and related apparatus for generating interpolated frame according to spatial relationship result and temporal matching difference

A method of interpolated frame generation and input source detection includes: receiving input frames; storing at least a first frame of successive frames in the input frames into a storage device under a film mode; comparing the stored first frame with a second frame of the successive frames not stored in the storage device to generate a first comparison result for determining whether to exit the film mode; and reading frames stored in the storage device to generate interpolated frames under the film mode.

Methods and related apparatus making effective use of bandwidth of storage device to generate interpolated frames

Data decoding devices avoiding data error from incorrect sampling points caused by serious interference are disclosed. The data decoding devices receive an analog signal carrying a reference clock and at least one digital data. In the data decoding device, a slicer generates a sampling clock with a frequency N times that of the reference clock, to slice the analog signal according to the sampling clock, thereby obtaining a first bitstream. A data check unit, divides the first bitstream into at least second and third bitstreams, evaluating whether the second bitstream is erroneous according to an error checking code thereof, outputting the second bitstream if it is error-free, and evaluating whether the third bitstream is erroneous according to the error checking code if the second bitstream is erroneous.

Data decoding device and method capable of avoiding data error from incorrect sampling points

Data decoding devices avoiding data error from incorrect sampling points caused by serious interference are disclosed. The data decoding devices receive an analog signal carrying a reference clock and at least one digital data. In the data decoding device, a slicer slices the analog signal at different sampling points by first and second sampling clocks to obtain first and second bitstreams, and the first and second sampling clocks have the same frequency and a predetermined phase difference. A data check unit evaluates whether the first bitstream is erroneous according to an error checking code thereof, outputs the first bitstream if it is error-free, and evaluates whether the second bitstream is erroneous according to the error checking code if the first bitstream is erroneous.

Method capable of avoiding data error from incorrect sampling points

A motion vector correction apparatus for correcting an estimated motion vector for a pixel located at a position of an interpolated frame between a first and a second frame is provided, including a three-frame motion estimation unit estimating a previous and a following motion vector fields; a motion vector selection unit determining a set of reference motion vectors associated with the first and second frame for the position of the pixel, wherein the reference motion vectors include a first motion vector set as the estimated motion vector and a pair of corresponding motion vectors from the previous and following motion vector fields; and a motion vector correction unit obtaining a measure of consistency between the corresponding motion vectors, adapting a plurality of weighted factors according to the measure of consistency and correcting the estimated motion vector according to the adapted weighted factors and the set of reference motion vectors.

Apparatus and methods for motion vector correction

A method for detecting a non-rigid-body in video coding and an integrated circuited for the same are disclosed. The integrated circuit capable of detecting non-rigid-body comprises a best matched block, a correlation unit, and a non-rigid-body detection unit. The best matched block unit receives a current block in a current video frame and block searching a reference video frame to determine an initial motion vector for a best matched block in the reference video frame. The correlation unit, coupled to the best matched block unit, receives the best matched block, and computes a correlation between a corresponding block and the best matched block. The non-rigid-body detection unit, coupled to the correlation unit, determines whether the current block contains non-rigid-body according to the correlation.

Method, video encoder, and integrated circuit for detecting non-rigid body motion

Power management methods for integrated circuits are disclosed. A system core block is disposed in a chip and comprises a central processing unit. A power control block is disposed in the chip and comprises a power management mechanism coupled to a power supply to control the supply of power to the system core block. The power management mechanism outputs a power down signal and stops supply of power to the system core block according to a power saving mode setting signal from the central processor unit and starts the supply of power to the system core block according to a power saving mode release signal.

Integrated circuit with power control and power control method thereof

A video signal processing system for slicing binary data transmitted in a video signal is provided, comprising a synchronous separator, a line counter, a slicing signal generator and a comparator. The synchronous separator detects Hsync and Vsync carried in the video signal. The line counter generates an enable signal by counting the number of scanning lines based on the detected Hsync and Vsync, wherein the enable signal is activate when the video signal carrying teletext and/or other binary data. The slicing signal generator further comprises an extreme value detector determining local maximum values and local minimum values of the video signal, and a slicing level determiner generating an adaptive slicing signal based on the local maximum values and the local minimum values. The comparator enabled by the enable signal compares the video signal with the slicing signal.

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Taipei County, Taiwan

Siou-Shen Lin