Imec Vzw

Imec

Katholieke Universiteit Leuven

Katholieke Universiteit Leuven, Ku Leuven R&d

Pacific Biosciences of California, Inc.

Katholieke Universiteit Leuven, K.u. Leuven Research & Development

Simone Severi

Veronique Rochus

Wouter Jan Westerveld

Bert Du Bois

Aurelie Humbert

Xavier Rottenberg

Pol Van Dorpe

Geert Van Der Plas

Roelof Jansen

Murali Jayapala

Koen Martens

Gert Claes

Giuseppe Fiorentino

John Heck

Peter Peumans

Annette Claire Grot

Liesbet Lagae

David Paul Brunco

Ravi Saxena

Nadine Collaert

Benjamin Jones

Luc Haspeslagh

Ann Witvrouw

Nicolaas Tack

Eddy Kunnen

Chang Chen

Brice De Jaeger

Peter Verheyen

Andim Stassen

Stéphane Donnay

Philippe Helin

George Bryce

David Barge

Ashesh Ray Chaudhuri

Md Mahmud Ul Hasan

Ajay Jain

Bin Guo

Pilar Gonzalez

Véronique Rochus

Mahmud Ul Hasan Hasan

A method for fabricating a microfluidic device includes providing an assembly that includes a first silicon substrate having a hydrophilic silicon oxide top surface that includes a microfluidic channel and a second silicon substrate having a hydrophilic silicon oxide bottom surface directly bonded on the top surface of the first silicon substrate, the second silicon substrate including fluidic access holes giving fluidic access to the microfluidic channel. The method also includes exposing the assembly to oxidative species including one or more oxygen atoms and to heat so as to form silicon oxide at a surface of the access holes and of the microfluidic channel.

Method for fabricating a microfluidic device

A method for forming a nanopore transistor and a nanopore transistor is provided. The method includes: (a) forming an aperture in a filler material by: (i) providing a fin comprising a semiconductor layer and a top layer; (ii) patterning the top layer to form a pillar; (iii) embedding the pillar in a filler material; (iv) removing the pillar, leaving an aperture; (v) lining the aperture with a spacer material; (b) forming a nanopore by etching through the aperture; (b) lining the nanopore with a dielectric, (c) forming a source and a drain by either: between steps a.ii and a.iii, doping the bottom semiconductor layer by using the pillar as a mask, or after step c, filling the aperture with a sealing material, thereby forming a post; removing the filler material; doping the bottom semiconductor layer by using the post as a mask; and removing the sealing material.

Nanopore transistor for biosensing

A microfluidic device, a diagnostic device including the microfluidic device and a method for making the microfluidic device are provided. The microfluidic device includes: (i) a transparent substrate comprising a cavity, the cavity opening up to a top of the transparent substrate; (ii) a transparent layer covering the cavity, and (iii) a semiconductor substrate over the transparent layer and the transparent substrate, wherein the semiconductor substrate comprises a through hole overlaying the cavity and exposing the transparent layer.

Microfluidic device

According to an aspect of the present inventive concept there is provided a method for manufacturing a fluid sensor device comprising: bonding a silicon-on-insulator arrangement comprising a silicon wafer, a buried oxide, a silicon layer, and a first dielectric layer, to a CMOS arrangement comprising a metallization layer and a planarized dielectric layer, wherein the bonding is performed via the first dielectric layer and the planarized dielectric layer; forming a fin-FET arrangement in the silicon layer, wherein the fin-FET arrangement is configured to function as a fluid sensitive fin-FET arrangement; removing the buried oxide and the silicon wafer; forming a contact to the metallization layer and the fin-FET arrangement, wherein the contact comprises an interconnecting structure configured to interconnect the metallization layer and the fin-FET arrangement; forming a channel comprising an inlet and an outlet, wherein the channel is configured to allow a fluid comprising an analyte to contact the fin-FET arrangement.

Method for manufacturing a fluid sensor device and a fluid sensor device

A sensor comprises: a thin structure, which is configured to receive a force for deforming a shape of the thin structure and which is arranged above a substrate; and a waveguide for guiding an electro-magnetic wave comprising: a first waveguide part; and a second waveguide part; wherein the second waveguide part has a larger width than the first waveguide part; and wherein the first and the second waveguide parts are spaced apart by a gap which is sufficiently small such that the first and second waveguide parts unitely form a single waveguide, wherein one of the first and the second waveguide part is arranged at least partly on the thin structure and another of the first and the second waveguide part is arranged on the substrate.

Environmental waveguide sensor with improved design configuration

A waveguide for guiding an electro-magnetic wave comprises: a first waveguide part; and a second waveguide part; wherein the first waveguide part has a first width in a first direction (Y) perpendicular to the direction of propagation of the electro-magnetic wave and the second waveguide part has a second width in the first direction (Y), wherein the second width is larger than the first width; and wherein the first and the second waveguide parts are spaced apart by a gap in a second direction (Z) perpendicular to the first and second planes in which the waveguide parts are formed, wherein the gap has a size which is sufficiently small such that the first and second waveguide parts unitely form a single waveguide for guiding the electro-magnetic wave. The waveguide may be used in numerous applications, such as in a photonic integrated circuit, in a sensor or in an actuator.

Waveguide for guiding an electro-magnetic wave comprising plural waveguide parts with different widths extend in parallel planes

In a first aspect, the present invention relates to a nanopore field-effect transistor sensor (), comprising: i) a source region () and a drain region (), defining a source-drain axis; ii) a channel region () between the source region () and the drain region (); iii) a nanopore (), defined as an opening in the channel region () which completely crosses through the channel region (), oriented at an angle to the source-drain axis, having a first orifice () and a second orifice (), and being adapted for creating a non-linear potential profile between the first () and second () orifice.

Nanopore FET sensor with non-linear potential profile

A method for manufacturing of a waveguide for guiding an electro-magnetic wave comprising: forming a first waveguide layer, a sacrificial layer and a protection layer on a first wafer, patterning to define a pattern of a first waveguide part and a supporting structure in the first waveguide layer; exposing the sacrificial layer on the first waveguide part while the protection layer still covers the sacrificial layer on the supporting structure; removing the sacrificial layer on the first waveguide part; removing the protection layer; bonding a second wafer to the sacrificial layer of the first wafer such that a second waveguide part is supported by the supporting structure and a gap corresponding to the thickness of the sacrificial layer is formed between the first and second waveguide parts.

Method for manufacturing a waveguide for guiding an electro-magnetic wave

Examples include a method for forming an intermediate in the fabrication of a field-effect transistor sensor, the method comprising: providing a substrate having a substrate region comprising a gate dielectric thereon and optionally a nanocavity therein, providing a sacrificial element over the substrate region, providing one or more layers having a combined thickness of at least 100 nm over the sacrificial element, opening an access to the sacrificial element through the one or more layers, and optionally selectively removing the sacrificial element, thereby opening a sensor cavity over the substrate region; wherein the sacrificial element is removable by oxidation and wherein selectively removing the sacrificial element comprises an oxidative removal.

Protecting a substrate region during fabrication of a FET sensor

Arrays of integrated optical devices and their methods for production are provided. The devices include an integrated bandpass filter layer that comprises at least two multi-cavity filter elements with different central bandpass wavelengths. The device arrays are useful in the analysis of highly multiplexed optical reactions in large numbers at high densities, including biochemical reactions, such as nucleic acid sequencing reactions. The devices provide for the efficient and reliable coupling of optical excitation energy from an optical source to the optical reactions. Optical signals emitted from the reactions can thus be measured with high sensitivity and discrimination. The device arrays are well suited for miniaturization and high throughput.

Arrays of optical devices comprising integrated bandpass filters and methods of production

The present disclosure relates to semiconductor devices for detecting fluorescent particles. At least one embodiment relates to an integrated semiconductor device for detecting fluorescent tags. The device includes a first layer, a second layer, a third layer, a fourth layer, and a fifth layer. The first layer includes a detector element. The second layer includes a rejection filter. The third layer is fabricated from dielectric material. The fourth layer is an optical waveguide configured and positioned such that a top surface of the fourth layer is illuminated with an evanescent tail of excitation light guided by the optical waveguide when the fluorescent tags are present. The fifth layer includes a microfluidic channel. The optical waveguide is configured and positioned such that the microfluidic channel is illuminated with the evanescent tail. The detector element is positioned such that light from activated fluorescent tags can be received.

Semiconductor device for detecting fluorescent particles

Micro-mirror arrays configured for use in a variable focal length lens are described herein. An example variable focal length lens comprises a micro-mirror array having a plurality of micro-mirror elements arranged in at least a first section and a second section. Each micro-mirror element has a tilt axis and comprises, on each of two opposing sides of the tilt axis, (i) at least one actuation electrode, (ii) at least one measurement electrode, and (iii) at least one stopper. Additionally, each micro-mirror element in the first section has a first tilt angle range, and each micro-mirror element in the second section has a second tilt angle range, with the first tilt angle range being less than the second tilt angle range.

Micro-mirror arrays

A built-in self-calibration system and method for a micro-mirror array device, for example, operating as a variable focal length lens is described. The calibration method comprises determining a capacitance value for each micro-mirror element in the array device at a number of predetermined reference angles to provide a capacitance-reference angle relationship. From the capacitance values, an interpolation step is carried to determine intermediate tilt angles for each micro-mirror element in the array. A voltage sweep is applied to the micro-mirror array and capacitance values, for each micro-mirror element in the array, are measured. For a capacitance value that matches one of the values in the capacitance-reference angle relationship, the corresponding voltage is linked to the associated tilt angle to provide a voltage-tilt angle characteristic which then stored in a memory for subsequent use.

Calibration of micro-mirror arrays

A method is disclosed for manufacturing a semiconductor device, including providing a substrate comprising a main surface with a non flat topography, the surface comprising at least one substantial topography variation, forming a first capping layer over the main surface such that, during formation of the first capping layer, local defects in the first capping layer are introduced, the local defects being positioned at locations corresponding to the substantial topography variations and the local defects being suitable for allowing a predetermined fluid to pass through. Associated membrane layers, capping layers, and microelectronic devices are also disclosed.

Method of manufacturing a semiconductor device and semiconductor devices resulting therefrom

A method is disclosed comprising providing a substrate comprising an insulating material and a second semiconductor material and pre-treating the substrate with a plasma produced from a gas selected from the group consisting of a carbon-containing gas, a halogen-containing gas, and a carbon-and-halogen containing gas. The method further comprises depositing a first semiconductor material on the pre-treated substrate by chemical vapor deposition, where the first semiconductor material is selectively deposited on the second semiconductor material. The method may be used to manufacture a semiconducting device, such as a microelectromechanical system device, or to manufacture a semiconducting device feature, such as an interconnect.

Method for selective deposition of a semiconductor material

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Leuven, Belgium

Simone Severi