Applied Materials, Inc.

Simon W Tam

Semyon Sherstinsky

Mei Yin Chang

Alfred W Mak

Manoocher Birang

Ashok K Sinha

Shamouil Shamouilian

Alan F Morrison

Charles C Harris

James F Roberts

Ajay Kumar

John F Cameron

Michael N Grimbergen

David N Wang

Madhavi R Chandrachood

Virendra V Rana

Jerry Yuen Wong

Xiaoyi Chen

Wen Teh Chang

Robert E Ryan

Ramesh Krishnamurthy

Jeffrey X Tran

Ronald P Reade

A method for etching a chromium layer is provided herein. In one embodiment, a method for etching a chromium layer includes providing a filmstack in an etching chamber, the filmstack having a chromium layer partially exposed through a patterned layer, providing at least one halogen containing process gas to a processing chamber, biasing the layer disposed on a substrate support in the processing chamber with a plurality of power pulses less than 600 Watts, and etching the chromium layer through a patterned mask. The method for plasma etching a chromium layer described herein is particularly suitable for fabricating photomasks.

Method for plasma etching a chromium layer suitable for photomask fabrication

A conventional plasma etch chamber is modified to reduce particulate generation in the chamber that contaminates the chamber and substrates mounted on a pedestal support being processed therein. A clamping ring cover in the chamber is made of ceramic. Grooves are machined into the cover and metal antennas can be mounted in the grooves to act as a getter for particles and pre-particle, non-volatile contaminants in the chamber. The clamping ring for the substrate being processed is also made of ceramic. Fewer particles are generated by ion bombardment using ceramic versus prior art clamping rings made of aluminum. Further, the cylinder clamping ring support which surrounds the pedestal support is fitted with a plurality of openings or windows to allow escape of purge gases that carry particles through the windows and into the adjoining exhaust system of the chamber and thus also away from the substrate being processed. Markedly fewer particles are deposited onto substrates using the modified plasma etch chamber of the invention than was found for unmodified chambers.

Etch chamber

An electrostatic chuck 20 of the present invention is capable of maintaining substantially uniform temperatures across a substrate 30. The chuck 20 comprises an electrostatic member 35 that includes (i) an insulator 45 covering an electrode 40, (ii) a substantially planar and conformal contact surface 50 capable of conforming to a substrate 30, and (iii) conduits 105 terminating at the contact surface 50 for providing heat transfer fluid to the contact surface 50. Application of a voltage to the electrode 40 of the electrostatic member 35 electrostatically holds the substrate 30 on the conformal contact surface 50 to define an outer periphery 110 having (1) leaking portions 115 where heat transfer fluid leaks out, and (2) sealed portions 130 where heat transfer fluid substantially does not leak out. A fluid flow regulator 135 is provided for flowing heat transfer fluid at different flow rates through the conduits 105 in the electrostatic member 35 to provide (i) first flow rates of heat transfer fluid through the conduits 105 adjacent to the sealed portions 130 of the outer periphery 110 of the electrostatic member 35, and (ii) second flow rates of heat transfer fluid through the conduits 105 adjacent to the leaking portions 115, the second flow rates being higher than the first flow rates, to maintain substantially uniform temperatures across the substrate 30 held on the chuck 20.

Electrostatic chuck with fluid flow regulator

An electrostatic chuck for securing a semiconductor wafer on a pedestal having multiple apertures for the introduction of cooling gas beneath the wafer. The multiple apertures reduce overheating near the wafer edge and provide lower temperature gradients across the wafer. The wafer is held by electrostatic force against a laminate of an electrode layer sandwiched between two dielectric layers in such a way that the laminate presents a planar surface to the wafer for a substantial distance beyond the outer edge of the electrode layer. The laminate construction ensures that a large wafer area beyond the outer edge of the electrode is in contact with the laminate, to minimize cooling gas leakage near the edge, and provides a longer useful life by increasing the path length of dielectric material between the electrode layer and potentially damaging plasma material surrounding the chuck.

Electrostatic chuck

A method of making a dielectric chuck for securing a semiconductor wafer on a pedestal having multiple apertures for the introduction of cooling gas beneath the wafer. The wafer is held by electrostatic force against a laminate of an electrode layer sandwiched between two dielectric layers in accordance with the method, such that the laminate presents a planar surface to the wafer for a substantial distance beyond the outer edge of the electrode layer. The laminate construction method ensures that a large wafer area beyond the outer edge of the electrode is in contact with the laminate, to minimize cooling gas leakage near the edge, and provides a longer useful life by increasing the path length of dielectric material between the electrode layer and potentially damaging plasma material surrounding the chuck.

Method of making a dielectric chuck

A compound clamp ring secures a semiconductor wafer having a wafer flat portion to a wafer pedestal during wafer processing while maintaining a continuous seal between the wafer edges and the wafer pedestal to prevent leakage of coolant gases circulated at the backside of the wafer into the process environment. The clamp ring has an annular wafer clamp surface adapted to press a round portion of the wafer into sealing abutment with the wafer pedestal. A cavity formed in the clamp ring securely receives a comb-like array of resilient flexures that are adapted to apply a yieldable bias to the flat portion of the wafer to complete the seal between the wafer and the pedestal at the flat portion of the wafer; and encloses the flexures to shield the flexures from process gases.

Compound clamp ring for semiconductor wafers

An improved clamping ring apparatus is disclosed comprising a clamping ring means for yieldably engaging a generally circular semiconductor wafer to peripherally clamp the wafer to a support pedestal to provide a peripheral seal between the wafer and the surface of the pedestal facing the wafer, adjacent the generally circular end edge of the wafer by providing a central generally circular opening in the clamping ring and a series of slots which radially extend outwardly from the central opening in the clamping ring means to thereby divide the inner portion of the clamping ring means into a series of yieldable fingers inwardly extending toward the central opening in the clamping ring means. In one embodiment, the sidewalls of the slots are slanted with respect to the planar surface of the clamping ring means at an angle sufficient, with respect to the thickness of the clamping ring means and the width of the slot,, to prevent a ray or a particle from a plasma, traveling in a direction perpendicular to the plane of the surface of the clamping ring means from striking surfaces underlying the clamping ring means, through the slot.

Clamping ring apparatus for processing semiconductor wafers

A two-step photoresist capping process for enhancing the etch resistance of photoresist during chlorinated plasma etching of silicon-containing materials comprises exposing the photoresist to a chlorinated plasma to form a silicon-chlorine containing material on the photoresist, and then exposing the resulting layer to an oxidizing plasma containing a chlorine etching species to selectivity oxidize the capping layer.

In-situ photoresist capping process for plasma etching

Growing community of inventors

San Jose, CA, United States of America

Simon W Tam