Infineon Technologies Ag

Qimonda Ag

Siemens Aktiengesellschaft

Infineon Technologies LLC

Simon Muff

Jens G Pohl

Hermann Ruckerbauer

Georg Braun

Oliver Kiehl

Siva RaghuRam

Abdallah Bacha

Martin Gall

Martin Brox

Harry Hedler

Peter Gregorius

Christian Hauser

Johann Winderl

Andre Schaefer

Christian Weiss

Josef Schuster

Friedrich Wanninger

Ekkehard Miersch

Michael Schneider

Eckehard Miersch

A memory module includes an electronic printed circuit board with at least one contact strip, a plurality of integrated memory components, at least one first and one second buffer component, and a number of conductor tracks, which proceed from the contact strip and which are arranged on or in the printed circuit board. The conductor tracks include data lines, control lines and address lines. The conductor tracks lead from the contact strip to the buffer components or to one of the buffer components. The printed circuit board has conductor tracks that are interposed between the first buffer component and the second buffer component and that lead from the first buffer component to the second buffer component.

Memory module and method for operating a memory module

A memory circuit includes multiple memory chips configured to store data and disposed in at least one stack. The memory circuit includes multiple ports configured to receive and transmit control signals and data to and from the memory chips and to supply energy to the memory circuit. The memory circuit includes a housing accommodating the multiple memory chips and the multiple ports.

Memory circuit having memory chips parallel connected to ports and corresponding production method

An integrated circuit module comprises a chip, the chip comprising a substrate with a first main area and a second main area, the first main area comprising two half-sets of pads, the chip further comprising an integrated circuit with components and two half-sets of connection lines, the connection lines connecting the components of the integrated circuit to the pads, the integrated circuit further comprising a changeover device, the changeover device having two switching states in order to interchange the electrical assignment between the half-sets of the connection lines and the half-sets of the pads, and a carrier, the carrier comprising contact pieces. The chip is arranged on the carrier with one of the two main areas of the chip facing the carrier and the contact pieces of the carrier are connected to the pads of the chip, wherein one of the two switching states of the changeover device is selected, depending on which of the two main areas of the chip is the area facing the carrier.

Method for producing a circuit module comprising at least one integrated circuit

An integrated semiconductor memory device comprises: a receiver circuit for receiving a data signal, a receiver circuit for receiving a command signal, and a receiver circuit for receiving an address signal. A programmable storage unit comprises programmable elements. A current of the receiver circuits is controlled in dependence on a state of the programmable elements of the programmable storage unit. Depending on the application in which the integrated semiconductor memory device is used, the current of the receiver circuits is increased or decreased. By decreasing the current of the receiver circuits a dissipation loss of the integrated semiconductor memory device is reduced.

Integrated semiconductor memory device

Semiconductor memory modules and semiconductor memory systems using the same are described herein. The modules divide a conventional DIMM into a series of separate, smaller memory modules. Each memory module includes at least one semiconductor memory chip arranged on a substrate; CAwD signal input lines arranged on the substrate in a first predetermined line number and connecting one of the semiconductor memory chips to CAwD input signal pins on the substrate; and rD signal output lines arranged on the substrate in a second predetermined line number and connecting the one or a last semiconductor memory to a second number of rD output signal pins of the substrate. In a semiconductor memory system including the semiconductor memory modules, each memory module is separately connected to a memory controller by the CAwD signal input lines and the rD signal output lines in a respective point-to-point fashion.

Re-driving CAwD and rD signal lines

In a first embodiment, the invention provides a memory module having an electronic printed circuit board and a plurality of semiconductor chips of the same type that are mounted on at least one outer face of the printed circuit board. The printed circuit board has a connector strip, which runs at a first edge of the at least one outer face in a first direction and has a multiplicity of electrical contacts that are lined up in the first direction. The printed circuit board extends in the first direction between two opposite second edges. At least nine of the semiconductor chips of the same type are respectively mounted next to one another on the outer face of the printed circuit board between the center of the printed circuit board and the respective second edge of the printed circuit board. The semiconductor chips of the same type respectively have a smaller dimension and, in the direction perpendicular to the smaller dimension, a larger dimension that is larger than the smaller dimension. A respective first group of four of the semiconductor chips of the same type, which are oriented so as to have their shorter dimension parallel to the connector strip, is arranged at the respective second edge of the printed circuit board. A second group of five semiconductor chips of the same type is respectively arranged between the first group of semiconductor chips and the center of the printed circuit board. The first group of semiconductor chips and the second group of semiconductor chips are actuated by two separate line buses whose conductor tracks branch toward all the semiconductor chips in the respective group of semiconductor chips.

Memory module with an electronic printed circuit board and a plurality of semiconductor chips of the same type

The present invention relates to a semiconductor device which provides a shortest possible connection between two semiconductor componentsandarranged in a manner lying opposite on a substrate. The two semiconductor componentsandare in each case arranged with their chip contact-connection regionsandfacing the substrate. A vertical through-plating deviceconnects the two chip contact-connection regionsand

Semiconductor device with semiconductor components connected to one another

A memory extension memory module, a memory module system, and a memory module is disclosed. The memory module including at least one memory device and a connector for connecting the memory module to a computer system, wherein the memory module additionally includes a surface-mounted connector for connecting a memory extension memory module to the memory module. Furthermore, a method for manufacturing a memory module is disclosed. The memory module including at least one memory device and at least one connector for connecting a memory extension memory module to the memory module, wherein the at least one memory device and the at least one connector are connected to the memory module in a single manufacturing process.

Memory module, memory extension memory module, memory module system, and method for manufacturing a memory module

A semiconductor component package configuration includes a semiconductor chip mounted to a printed circuit board, and a substrate arranged between the semiconductor chip and the printed circuit board. The substrate is for routing the wiring terminals of the semiconductor chip to the printed circuit board. The substrate is connected to the printed circuit board by solder joints. A filler between the semiconductor chip and the substrate mechanically isolates the semiconductor chip and the solder joints. A metal layer, which is connected to solder joints, is applied to the substrate. At least one molded element of heat-dissipating material is applied to the metal layer and is connected in a heat-conducting manner to the metal layer. This provides the package configuration with an improved capability of conducting the lost power that is dissipated from the installed semiconductor chip, and the desired mechanical properties of the package arrangement are retained.

Encasing arrangement for a semiconductor component

A method and a device adapt/tune signal transit times on line systems or networks between integrated circuits which are mounted on printed circuit boards. Fine tuning of differences in transit times can be easily carried out by capacitive load structures disposed on conductor tracks in the vicinity of chip housings of the integrated circuits on the printed circuit boards by disconnecting connecting lines using a cutting laser.

Method and device for adapting/tuning signal transit times on line systems or networks between integrated circuits

Interface parameters for a plurality of semiconductor devices, particularly parameters for output drivers (i.e. on chip driver) and terminations (i.e. on die termination) for double data rate dynamic random access memories, are aligned using a calibration reference which is common to the semiconductor devices and is connected to calibration connections on the semiconductor devices. The semiconductor devices are calibrated in succession, in each case individually, and the calibration connection on the respective semiconductor device which is currently performing calibration is connected to an internal calibration unit by an internal switching unit in the process, and the calibration connections on all other semiconductor devices are terminated to a high impedance internally.

Method for calibrating semiconductor devices using a common calibration reference and a calibration circuit

An integrated circuit which is integrated in a housing having connecting pins fitted to the housing for connecting the housing to signal lines of an external circuit, each connecting pin connected by an associated wiring line to a contact pad of the circuit integrated in the housing, to exchange signals between the external circuit and the integrated circuit, where to minimize the line lengths of the associated wiring lines, the connecting pins to be connected to signal lines for high-frequency signals are fitted centrally to the housing.

Integrated circuit

A method and a device for time measurement at a designated signal pin or associated solder pad on a semiconductor module on which semiconductor chips are mounted using the ball-grid-array technique. Integrated on the semiconductor module in the direct vicinity of a solder pad associated with the signal pin to be measured is an equivalent conductor pattern, which can be loaded with passive components in such a way that, in the loaded state, it forms an equivalent load circuit for the designated signal pin which simulates the time-relevant characteristic electrical values of the designated signal pin. The measurement takes place after connection of the ELC to a solder pad associated with the signal pin, with the semiconductor chip detached from the semiconductor module.

Method and device for time measurement on semiconductor modules employing the ball-grid-array technique

A lead frame is described which has at least one integrated electronic circuit. The integrated electronic circuit is situated in a region of a main area of the lead frame. The lead frame has at least one signal line, at least one electrically insulating plate, and an electrically conductive, grounded plate are situated. The electrically insulating plate, and the electrically conductive, grounded plate are situated, at least in sections, between the integrated electronic circuit and the signal line. A method for producing the lead frame is also described.

Lead frame, circuit board with lead frame, and method for producing the lead frame

The present invention provides an apparatus for connecting semiconductor modules, in particular memory banks, having: at least two devices (A, B) for receiving a respective semiconductor module ( ); a contact device ( ) having a first group of contacts ( ) and a second group of contacts ( ), the two groups being able to be connected to one another by means of a variable connection module ( ); a group of lines ( ) for connecting the receiving devices (A, B) to the first group of contacts ( ), a subgroup ( ) of the first group of contacts being assigned to the lines ( ) of the first receiving device (A); the connection module ( ) connecting either a subgroup of the contacts ( ) to the second group of contacts ( ), or the first group of contacts ( ) to the second group of contacts ( ). The present invention likewise provides a method for connecting semiconductor modules, in particular memory banks.

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Mering, Germany

Simon Muff