Lilac Cloud, Inc.

Cisco Technology, Inc.

Intel Corporation

Google Inc.

Cadence Design Systems, Inc.

Simon Luigi Sabato

Harish Ramamurthy Devanagondi

Jay S Shah

Jui-Yang Lu

Srikanth Lakshminarasimhan

Mitchell Grant Poplack

Hiroshi Suzuki

Harish P Belur

You-Wen Yi

Prashant R Chandra

Ilango S Ganga

Hugh Barrass

Abhishek Agarwal

Hema Hariharan

Daniel Earle Gibson

Miguel A Guerrero

Vishram Sarurkar

Milo Martin

Monica C Wong-Chan

Ajith Prasad

Gopal Hegde

Anoop R Hegde

Ye Tang

Jasper Yeung

Surendra Rathaur

Amamath Mutt

Umesh Kumar Muniswamy

In an embodiment, content data delivery to a requesting device in a content delivery network (CDN) may be handled by a server device using a content cache of a computing device associated with the server device. The computing device may be a component of, local to, and/or directly connected to the server device. The server device receives a request to deliver the content data, determines that the location of the content data is in the content cache, and responsive to this determination, sends instructions to the computing device to provide the content data to the requesting device. In one embodiment, the server device may acquire and provide the content data to the computing device for storage in the content cache, before or in response to receiving the request to deliver the content data.

Application cache acceleration using device content cache

In an embodiment, application delivery to end-user devices may be handled by a combination of an application device and a distributed set of split edge devices located closer to the end-user device within a network. The split edge devices are instructed by the application device about how to manage traffic to and from the end-user devices. The application device determines whether content is stored to content cache of a split edge device. The application device, when the content is stored to the split edge device, refrains from sending the content and instead sends instructions to the split edge device that include reference to a location of the content, and instruct the split edge device to send the content to an application and/or device. The application device, when the content is not stored to the split edge device, sends the content with instructions to store the content locally.

Distributed split edge application architecture

In an embodiment, responsive to determining: (a) a first command is not of a particular command type associated with one or more hardware modules associated with a particular routing node, or (b) at least one argument used for executing the first command is not available: transmitting the first command to another routing node in the hardware routing mesh. Upon receiving a second command of the command bundle and determining: (a) the second command is of the particular command type associated with the hardware module(s), and (b) arguments used by the second command are available: transmitting the second command to the hardware module(s) associated with the particular routing node for execution by the hardware module(s). Thereafter, the command bundle is modified based on execution of the second command by at least refraining from transmitting the second command of the command bundle to any other routing nodes in the hardware routing mesh.

Command-aware hardware architecture

Aspects of the disclosure are directed to supporting time synchronization across a datacenter network with greater accuracy. The time synchronization includes both software based and hardware based time synchronization mechanisms to provide more precise time synchronization across various nodes in the datacenter network. The software based mechanism can provide the initial coarse time synchronization while the hardware based mechanism can provide the subsequent finer time synchronization.

Mechanism for precise time synchronization in a datacenter network

In an embodiment, a compiler for generating command bundles is configured to receive an execution definition that includes operations for execution. The compiler determines an ordered set of hardware functions corresponding to a hardware architecture to execute at least one operation. The hardware architecture may be selected from typical processor types or a command-aware hardware processor. The compiler generates a command bundle that includes a set of logically independent commands based on hardware functions and functionality of the hardware architecture to optimize execution of the operations. A command-aware hardware processor includes a hardware routing mesh that includes sets of routing nodes that form one or more hardware pipelines. Many hardware pipelines may be included in the hardware routing mesh. A command bundle is transmitted through a selected hardware pipeline via a control path, and is modified by the routing nodes based on execution of commands to achieve a desired outcome.

Compiler for a command-aware hardware architecture

System utilization related to memory usage can be monitored by storing host memory usage information in the corresponding host physical memory. However, retrieving this information can be a high overhead operation because it involves engaging with the operating system of each host. Moreover, storing memory usage information in the host physical memories can pose a security risk if they also store privileged data. Network interfaces according to the present disclosure provide unobtrusive and secure support for monitoring of network and other system resources such as regions of memory within host physical memories. Implementations according to the present disclosure include a plurality of memory region counters stored on a network interface. Each memory region counter corresponds to one of the memory regions located in a physical memory of a host coupled to the network interface. Each of the counters includes a system utilization metric associated with its corresponding memory region.

Unobtrusive support for third-party traffic monitoring

Methods, apparatuses, and computer-readable medium for providing a fairness protocol in a network element are disclosed herein. An example method includes receiving one or more packets at each of a plurality of ingress ports of the network element, and scheduling the packets into a plurality of queues, wherein each of the queues is associated with packets that are sourced from one of the ingress ports. The method also includes monitoring a bandwidth of traffic sourced from each of the ingress ports, identifying a port among the ingress ports that sources a smallest bandwidth of traffic, and arbitrating among the queues when transmitting packets from an egress port of the network element by giving precedence to the identified port that sources the smallest bandwidth of traffic. Additionally, arbitrating among the queues distributes a bandwidth of the egress port equally among the ingress ports.

Port-based fairness protocol for a network element

A method of encoding a data word in a physical coding sublayer before serial transmission is provided, where data words comprising data bits are received, and the data words encoded using one or more 8B/10B encodings to generate 8B/10B transmission characters. ECC check bits are then generated, and the transmission characters and ECC check bits DC balanced prior to shuffling the bits together to form an encoded word to be transmitted. A receiver may decode by implementing a decode process with error correction. In some embodiments 26 data bits from two 13-bit word are encoded into a 40-bit encoded word. Bits of two or more encoded words may be interleaved for transmission, or multiple copies of encoded words sent. An integrated circuit serializer/deserializer comprises hardware to perform encoding and/or decoding. A hardware functional verification system may also implement the disclosed encoding/decoding for interconnections between emulation chips.

System and method of encoding in a serializer/deserializer

In one form a method of encoding a data word for serial transmission is provided, where a data word comprising a plurality of data bits is received, an invert bit having a bit value is appended to the data word, the data bits and invert bit are scrambled, ECC check bits are generated, and the data bits, invert bit, and ECC check bits are shuffled together to form an encoded word to be transmitted from a transmitter. A receiver may decode by implementing a decode process with error correction. The encoded word may also be DC balanced by checking the disparity of the bits to be encoded against a running disparity to invert or not the bits. An integrated circuit serializer/deserializer comprises hardware to perform encoding and/or decoding. A hardware functional verification system may implement the disclosed encoding/decoding for interconnections between emulation chips.

Methods and systems to explicitly realign packets are described. The system includes a first communications device that receives a first stream of bytes comprising a first packet and generates realignment information for the first packet based on an alignment restriction. The first communications device further transmits a second stream of bytes over the data path comprising the first packet and the realignment information. The transmitting of the first byte of the first packet over the data path being in accordance with the alignment restriction that is associated with an interface. The realignment information identifies a difference between a time that the first byte of the first packet would have been transmitted by the first communications device without the alignment restriction and a time of transmission of the first byte of the first packet by the first communications device in accordance with the alignment restriction.

Systems and methods to explicitly realign packets

Methods and apparatuses for providing a fairness protocol in a network element are disclosed herein. In accordance with the disclosed fairness protocol, the average bandwidth of traffic sourced from each of a plurality of ingress ports is monitored. The largest bandwidth of traffic sourced from a port within a first group of ingress ports (e.g., ingress ports of a network element) is identified and compared to the largest bandwidth of traffic sourced from a port within a second group of ingress ports (e.g., ingress ports of one or more network elements communicatively connected to the network element). In order to fairly allocate bandwidth when transmitting traffic that is sourced from the first and second groups, precedence is given to traffic flowing from the group associated with the identified port sourcing the lower bandwidth of traffic.

The disclosure describes queue management based on queue sets. A queue set comprises a group of packets or packet references that are processed as a single entity or unit. For example, when a queue set reaches the head of a queue in which it is stored, the entire queue set including its packets or packet references is passed for scheduling as a single unit. A queue set provides the benefit of a single operation associated with enqueuing and a single operation associated with dequeuing. Since only one operation on a queue is required for the typical case of several packets in a queue set rather than for every packet, the rate of queue operations may be significantly reduced. A queue set has a target data unit size, for example, a roughly equal number of packet bytes represented by each queue set, regardless of the number of packets referenced by a queue set. This means that a scheduler of a queue manager, which is tasked with metering the number of packet bytes transmitted from each queue per time unit, is provided with a list of packets which represents a predictable quantity of packet bytes, and this predictability streamlines the scheduling task and significantly reduces the number of operations.

System and method for queue management using queue sets

A method, apparatus, and system for staggering time zones.

Growing community of inventors

Saratoga, CA, United States of America

Simon Luigi Sabato