Macom Technology Solutions Holdings, Inc.

Simon J Mahon

Emmanuelle R O Convert

James T Harvey

Ryan M Clement

Allen W Hanson

Rajesh Baskaran

Chuanxin Lian

Frank Gao

Bryan Schwitter

Anna Dadello

Alan C Young

Leif G M Snygg

Thermally-sensitive structures and methods for sensing the temperature in a region of a FET during device operation are described. The region may be at or near a region of highest temperature achieved in the FET. Metal resistance thermometry (MRT) can be implemented with gate or source structures to evaluate the temperature of the FET.

FET operational temperature determination by field plate resistance thermometry

FET operational temperature determination by gate structure resistance thermometry

An apparatus includes a laminate and a lid. The laminate generally includes a dielectric layer between a first conductive layer and a second conductive layer. The first conductive layer may include a probe configured to transfer a radio-frequency signal in a millimeter-wave band. The second conductive layer may be configured to provide a continuous ground plane parallel to the probe and separated from the probe by the dielectric layer. A plurality of channels may be (a) formed into a side of the second conductive layer opposite the dielectric layer, (b) formed to a depth less than a thickness of the second conductive layer, and (c) sized to permit gasses formed while securing the laminate to a substrate to escape from between the laminate and the substrate. The lid may be in contact with the first conductive layer.

Ground pattern for solderability and radio-frequency properties in millimeter-wave packages

An apparatus includes a first circuit and a second circuit. The first circuit may have a first diode and a second diode connected as anti-parallel diodes and physically adjacent to each other in a substrate. The second circuit may have a third diode and a fourth diode connected as anti-parallel diodes and physically adjacent to each other in the substrate. The first circuit and the second circuit may be configured to mix two input signals to generate an output signal. A polarity of every other physically neighboring diode may be reversed.

Alternating anti-parallel diode mixer structure

An apparatus includes a package, a wall and a lid. The package may be configured to mount two chips configured to generate one or more signals in a millimeter-wave frequency range. The wall may be formed between the two chips. The wall generally has a plurality of conductive arches that attenuate an electromagnetic coupling between the two chips in the millimeter-wave frequency range. The lid may be configured to enclose the chips to form a cavity.

Electromagnetic wall in millimeter-wave cavity

An apparatus includes a first receiver frequency conversion stage and a second receiver frequency conversion stage. The first receiver frequency conversion stage may be configured to generate at least four first intermediate frequency signals in response to a radio frequency (RF) input signal and respective phases of a first local oscillator signal. The second receiver frequency conversion stage may be configured to generate at least four output signals in response to the at least four first intermediate frequency signals and one or more phases of a second local oscillator signal. Each of the at least four output signals is generated in an independent channel in response to a respective one of the at least four first intermediate frequency signals and a respective one of the one or more phases of the second local oscillator signal.

Double down-conversion with multiple independent intermediate frequencies for E-band applications

An apparatus having a plurality of power pads of an integrated circuit, a plurality of transistors, and one or more diodes is disclosed. Each transistors may have a drain that forms a junction with a conductive layer of the integrated circuit. The diodes may be coupled between two of the power pads. A first portion less than all of an electro-static discharge that passes through a first of the two power pads and the conductive layer may be transferred through a first of the drains in a first of the transistors. A second portion less than all of the electro-static discharge may be transferred sequentially through (a) at least one of the diodes and (b) a second of the drains in a second of the transistors.

Electro-static discharge protection in integrated circuit based amplifiers

An apparatus includes a first circuit and a second circuit. The first circuit may be fabricated in a substrate and generally includes a first diode and a second diode (i) connected as anti-parallel diodes and (ii) physically adjacent to each other in the substrate. The second circuit may be fabricated in the substrate and generally includes a third diode and a fourth diode (i) connected as anti-parallel diodes and (ii) physically adjacent to each other in the substrate. The first circuit and the second circuit may be (a) connected in parallel, (b) physically adjacent to each other in the substrate and (c) configured to mix two input signals to generate an output signal.

An apparatus having a package, a wall and a lid is disclosed. The package may be configured to mount a plurality of chips. Two of the chips may generate a plurality of signals in a millimeter-wave frequency range. A metal is exposed at a surface of the package between the two chips. The metal is generally connected to an electrical ground. The wall may be formed on the metal and between the two chips. The wall generally has a plurality of arches that (i) are conductive, (ii) are wire bonded to the metal and (iii) attenuate an electromagnetic coupling between the two chips at the millimeter-wave frequency. The lid may be configured to enclose the chips to form a millimeter-wave cavity.

An apparatus includes a first receiver and a second receiver. The first receiver may be configured to generate a plurality of first intermediate frequency signals in response to a radio frequency (RF) input signal and a first local oscillator signal. The second receiver may be configured to generate a plurality of output signals in response to the first intermediate frequency signals. Each of the output signals is generated in an independent channel in response to a respective one of the first intermediate frequency signals and a respective second local oscillator signal.

A semiconductor device including a plurality of source pads, a plurality of drain fingers, a plurality of gate fingers, a drain combiner connected to the plurality of drain fingers, and a gate combiner connected to the plurality of gate fingers. The plurality of source pads generally comprises a pair of end source pads and one or more inner source pads. Each end source pad is configured to have added inductance. Each of the drain fingers is generally disposed between two of the plurality of source pads. Each of the gate fingers is generally disposed between a respective source pad and a respective drain finger.

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Avalon, Australia

Simon J Mahon