Analog Devices,inc.

Mirics Semiconductor Limited

Mediatek Corporation

Simon Atkinson

Palle Birk

Jonathan Richard Strange

Aidan Cahalane

Antonio J Montalvo

Robert J Broughton

Zoran Zvonar

Dan Budin

Anthony Eaton

Keith Ahluwalia

Stacey Ho

Alexander Shvarts

An interface circuit configured to connect between (a) a broadcast receiver tuner and associated circuitry for the receiving and processing of broadcast radio frequency signals, and (b) a general purpose computer device programmed with software demodulation code configured to engage a general purpose processor in signal demodulation functions, the interface circuit comprising: a data interface comprising a packetisation buffer connected to receive (i) digital signal sample data from a signal path of the tuner and associated circuitry and (ii) indications of control settings which are applied to one or more configurable components during taking of the sample data, said packetisation buffer being operable to construct packets comprising blocks of sample data and header information carrying said control settings indications; a control interface configured to receive control instructions from tuner control code running on the general purpose computer device; and a microcontroller operable to receive the control instructions from the control interface and distribute corresponding control settings to configurable components of the tuner and associated circuitry, said microcontroller also being operable to supply indications of relevant control settings to said packetisation buffer.

Broadcast receiver system

A homodyne receiver is provided for receiving GSM and UMTS transmissions. The receiver may also be used for other transmission schemes. The receiver includes an electronically reconfigurable low pass filter and an off set generator for providing DC offset correction for offsets which may be generated as a result of coupling between a local radio frequency oscillator and the receiver front end.

3G radio

A dual mode transmitter for GSM and UMTS operation is provided. The GSM and UMTS paths share an oscillator and an intermediate frequency stage. Also, with the exception of the final stage of power amplification, the transmitter is provided as an integrated device.

A radio transceiver suitable for use in a mobile telephone is provided. The transceiver is operable in dual modes so as to be able to operate with both GSM and UMTS systems. In a preferred embodiment the transmitter section receives base band signals and up-converts them to an intermediate frequency of approximately 450 MHz. This is then mixed with local oscillator frequency of approximately 1.35 GHz, such that a difference frequency allows operation in the GSM 850/950 MHz band, and the sum frequency allows operation in the GSM 1800/1900 MHz bands. The frequency addition allows operation in the UMTS band. The receiver portion of the transceiver comprises a direct conversion receiver for down-converting the received signal without use of an intermediate frequency.

A transceiver circuit is disclosed for use in radio frequency communication systems. The circuit includes a transmitter circuit, a receiver circuit and a local oscillator circuit. The local oscillator circuit includes at least one oscillator input signal having a frequency that is a non-integer multiple of the transmission frequency of the radio frequency communication system. The oscillator input signal is used to produce a transmitter local oscillator signal and a receiver local oscillator signal.

Transmitter and receiver circuit for radio frequency signals

A direct conversion circuit for radio frequency signals is disclosed. The circuit includes a pair of quadrature related mixers, a phase shift unit, and a local oscillator. The pair of quadrature related mixers is coupled to a radio frequency signal input port for mixing down a radio frequency input signal. The phase shift unit is in communication with at least one of the pair of mixers for phase shifting a local oscillator signal. The local oscillator produces the local oscillator signal. The local oscillator includes a non-integer frequency multiplier for multiplying the frequency of a first voltage controlled oscillator signal by a non-integer value to produce the local oscillator signal.

Direct conversion circuit for radio frequency signals

Phase-locked loop methods and structures are provided for generating modulated communication signals with nonconstant envelopes. These methods and structures realize the improved communication performance of nonconstant-envelope modulations with the upconversion advantages of phase-locked loops. The structures include transmitters in which a phase-locked loop is augmented with first and second feedforward paths that substantially restore phase and amplitude information to a transmit signal that is generated by a voltage-controlled oscillator of the phase-locked loop. The first feedforward path is configured to realize a path transfer function of s/Kv wherein the voltage-controlled oscillator has a transfer function of Kv/s. The second feedforward path extracts an envelope-correction signal from the modulated intermediate-frequency signal and a variable-gain output amplifier amplifies the transmit signal with a gain that responds to the envelope-correction signal.

Phase-locked loop methods and structures for generating modulated communication signals with nonconstant envelopes

A direct current offset correction system is disclosed for use in an analog signal processing system. The offset correction system includes a comparator unit for comparing the polarity of signals from an analog signal channel and producing a binary output signal. The system also includes a digital accumulator unit that is coupled to the comparator output signal for providing an accumulated average signal over a predetermined period of time. The system also includes a threshold corrective signal unit for determining whether the accumulated signal is within a defined threshold window of acceptable values. The system further includes a correction unit for applying a corrective signal to the analog signal channel.

Offset calibration system and method for a high gain signal channel

A crystal oscillator circuit is disclosed including a differential amplifier, a positive feedback assembly, and a series resonant crystal assembly. The differential amplifier includes a first transistor and a second transistor. The positive feedback assembly is coupled to each of the first and second transistors, and has a loop gain of greater than unity. The series resonant crystal assembly is coupled to one of the first and second transistors, and includes a crystal and a capacitor.

Low power crystal oscillator with feedback resistor pair

A variable gain amplifier system for radio frequency signals is disclosed. The system provides a relatively constant gain change in decibels responsive to an incremental change in control voltage. The system includes two or more cascaded gain stage amplifiers. Each gain stage amplifier is adjustable between a first gain setting and a second gain setting.

Growing community of inventors

Heathfield, United Kingdom

Simon Atkinson