Arm Limited

Simon Alex Charles

Andreas Due Engh-Halstvedt

Jorn Nystad

Sean Tristram Ellis

Andrew Burdass

A method of prefetching attribute data from storage for a graphics processing pipeline comprising a cache, and at least one buffer to which data is prefetched from the storage and from which data is made available for storing in the cache. The method comprises retrieving first attribute data from the storage, the first attribute data representative of a first attribute of a first vertex of a plurality of vertices of at least one graphics primitive, identifying the first vertex, and, in response to the identifying, performing a prefetch process. The prefetch process comprises prefetching second attribute data from the storage, the second attribute data representative of a second attribute of the first vertex, the second attribute being different from the first attribute, and storing the second attribute data in a buffer of the at least one buffer.

Prefetching data

Apparatus for processing data includes processing circuitryand decoder circuitryfor decoding program instructions. The program instructions decoded include a floating point pre-conversion instruction which performs round-to-nearest ties to even rounding upon the mantissa field of an input floating number to generate an output floating point number with the same mantissa length but with the mantissa rounded to a position corresponding to a shorter mantissa field. The output mantissa field includes a suffix of zero values concatenated the rounded value. The decoder for circuitryis also responsive to an integer pre-conversion instruction to quantise and input integer value using round-to-nearest ties to even rounding to form an output integer operand with a number of significant bits matched to the mantissa size of a floating point number to which the integer is later to be converted using an integer-to-floating point conversion instruction.

Number format pre-conversion instructions

A graphics processing system for processing polygons includes a cache with cache lines for storing data entries, each line having a tag for identifying the data stored in the line. The polygons have vertices with which pieces of vertex attribute data are associated. The system also includes processing circuitry which writes, to a line in a first set of lines, data entries associated with pieces of vertex attribute data. The pieces of vertex attribute data are associated with the vertices of a polygon. The processing circuitry also writes a tag including a polygon identifier to identify the polygon associated with the data entries to the line in the first set of lines, and writes, to a second set of lines of the cache, data entries associated with pieces of vertex attribute data. The processing circuitry also writes tags including vertex identifiers to the second set of lines to identify the vertices associated with the data entries.

Graphics processing system for and method of storing and querying vertex attribute data in a cache

A single instruction multiple data processing pipelinefor processing floating point operands includes shared special case handling circuitryfor performing any operand dependent special case processing operations. The operand dependent special case processing operations result from special case conditions such as operands that are denormal, an infinity, a not-a-number and a floating point number requiring format conversion. The pipelinemay in some embodiments be stalled while the operands requiring special case processing are serially shifted to and from the shared special case handling circuitry. In other embodiments the instruction in which the special case condition for an operand arose may be recirculated through the pipeline with permutation circuitrybeing used to swap the operands between lanes in order to place the operand(s) requiring special case processing operations into the lane containing the shared special case handling circuitry

Operand special case handling for multi-lane processing

Apparatus for processing data includes processing circuitryand decoder circuitryfor decoding program instructions. The program instructions decoded include a floating point pre-conversion instruction which performs round-to-nearest ties to even rounding upon the mantissa field of an input floating number to generate an output floating point number with the same mantissa length but with the mantissa rounded to a position corresponding to a shorter mantissa field. The output mantissa field includes a suffix of zero values concatenated the rounded value. The decoder for circuitryis also responsive to an integer pre-conversion instruction to quantize and input integer value using round-to-nearest ties to even rounding to form an output integer operand with a number of significant bits matched to the mantissa size of a floating point number to which the integer is later to be converted using an integer-to-floating point conversion instruction.

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Cambridge, United Kingdom

Simon Alex Charles