Yangtze Memory Technologies Co., Ltd.

Simin Liu

Bo Xu

Yali Guo

Zhipeng Wu

Lu Zhang

Kai Han

Hang Yin

Zongliang Huo

Wei Xu

Bin Chen

Jie Su

Siliu Zhang

The present disclosure discloses a three-dimensional memory and a fabrication method thereof. The fabrication method comprises: forming a stack structure comprising alternately stacked dielectric layers and sacrificial layers; forming a gate line slit penetrating vertically penetrating the stack structure and extending in a first horizontal direction; and etching portions of the dielectric layers and the sacrificial layers adjacent to the gate line slit to form a plurality of recesses, wherein an aperture of each recess in a vertical direction is greater than a thickness of a corresponding sacrificial layer.

Three-dimensional memory and fabrication method thereof

A memory device includes a staircase region and an array region, along a first lateral direction; a wall structure in the staircase region; and a first separation structure in the array region and arranged along the first lateral direction with the wall structure. The wall structure includes dielectric pairs of a first dielectric layer and a second dielectric layer stacked in the staircase region. The first separation structure is vertically through a stack structure in the array region. The stack structure includes pairs of the first dielectric layer and an electrode layer.

Memory device and fabrication method thereof

A memory device includes a substrate; and a stack structure, including alternately arranged first dielectric layers and electrode layers. In a first lateral direction, the memory device includes array regions and a staircase region arranged between array regions. In a second lateral direction, the stack structure includes a first block and a second block, each including a wall-structure region and extending along the first lateral direction. The wall-structure regions of the first block and the second block are adjacent to each other and together form a wall structure in the staircase region. The memory device also includes a first separation structure, formed through the stack structure and positioned between the first block and the second block in array regions along the first lateral direction; and second dielectric layers positioned between the first block and the second block in the staircase region, and alternated with the first dielectric layers.

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Wuhan, China

Simin Liu