Alpha & Omega Semiconductor Corporation

Vishay-siliconix

Vishay Intertechnology, Inc.

Alpha and Omega Semiconductor (cayman) Ltd.

Other

Siliconix Incorporated

Alpha and Omega Semiconductor International LP

Sik Lui

Anup Bhalla

Madhur Bobde

Daniel Ng

Hamza Yilmaz

Jongoh Kim

Jacek Korec

Tiesheng Li

Hong Chang

Sung-Shan Tai

John Chen

Daniel S Calafut

Yeeheng Lee

Yueh-Se Ho

François Hébert

Mike F Chang

Ji Pan

Haim Goldberger

Y Mohammed Kasem

Leeshawn Luo

Jack Van Den Heuvel

Harianto Wong

Lingpeng Guan

Xiaobin Wang

Yi Qiang Su

Xiaorong Shi

Dorman C Pitzer

Wei D Wang

Xiao Meng Zhang

Wenjun Li

Jowei Dun

Hongyong Xue

Sanjay Havanur

Lei Zhang

Terence Huang

Ching-Kai Lin

Yi Chang Yang

Harsh Naik

Fei Wang

Jun Hu

Hideaki Tsuchiko

Yongping Ding

Domon Pitzer

Yangping Ding

Dorman Pitzer

A device and a method of making the device comprising, a semiconductor substrate layer and an epitaxial layer formed on the semiconductor substrate. One or more trenches are formed in the epitaxial layer, each trench having a pair of opposing sidewalls, wherein a distance between the opposing sidewalls is greater near a bottom of the trench than near a top of the trench, wherein the bottom of the trench is closer to the semiconductor substrate layer than the top.

High density shield gate transistor structure and method of making

An improved inverted field-effect-transistor semiconductor device and method of making thereof may comprise a source layer on a bottom and a drain disposed on a top of a semiconductor substrate and a vertical current conducting channel between the source layer and the drain controlled by a trench gate electrode disposed in a gate trench lined with an insulating material. A heavily doped drain region is disposed near the top of the substrate surrounding an upper portion of a shield trench and the gate trench. A doped body contact region is disposed in the substrate and surrounding a lower portion of the shield trench. A shield electrode extends upward from the source layer in the shield trench for electrically shorting the source layer and the body region wherein the shield structure extends upward to a heavily doped drain region and is insulated from the heavily doped drain region to act as a shield electrode.

Bottom source trench MOSFET with shield electrode

A bi-directional semiconductor switching device is formed by forming first and second vertical field effect transistors (FETs) formed in tandem from a semiconductor substrate. A source for the first FET is on a first side of the substrate and a source for the second FET is on a second side of the substrate opposite the first side. Gates for both the first and second. FETs are disposed in tandem in a common set of trenches formed a drift region of the semiconductor substrate that is sandwiched between the sources for the first and second FETs. The drift layer acts as a common drain for both the first FET and second FET.

Bidirectional switch having back to back field effect transistors

This invention discloses a semiconductor power device. The trenched semiconductor power device includes a trenched gate, opened from a top surface of a semiconductor substrate, surrounded by a source region encompassed in a body region near the top surface above a drain region disposed on a bottom surface of a substrate. The semiconductor power device further includes an implanting-ion block disposed above the top surface on a mesa area next to the body region having a thickness substantially larger than 0.3 micron for blocking body implanting ions and source ions from entering into the substrate under the mesa area whereby masks for manufacturing the semiconductor power device can be reduced.

Device structure and manufacturing method using HDP deposited source-body implant block

A trench metal-oxide-semiconductor field-effect transistor (MOSFET) device, comprising a substrate of a first conductivity type, a body region of a second conductivity type, a gate electrode formed in a gate trench extending in the body region and substrate, a lightly doped source region and a heavily doped source region formed in the body region, and a trench contact extending to the body region formed in a contact trench. A contact implant of the second conductivity type is formed surrounding a bottom portion of the contact trench and it also forms surrounding sidewall portions of the contact trench where it contacts with the lightly doped source region to form a PN diode.

Source ballasting for p-channel trench MOSFET

A semiconductor power device formed in a semiconductor substrate that includes a plurality of trenches formed at a top portion of the semiconductor substrate. The trenches extend laterally across the semiconductor substrate along a longitudinal direction and each trench has a nonlinear portion thus the nonlinear portion has a trench sidewall perpendicular to the longitudinal direction of the trench. A plurality of trench bottom dopant regions are formed below the trench bottom surface. A sidewall dopant region is formed along the perpendicular sidewall wherein the sidewall dopant region extends vertically downward along the perpendicular sidewall of the trench to reach the trench bottom dopant region and pick-up the trench bottom dopant region to the top surface of the semiconductor substrate.

Process method and structure for high voltage MOSFETs

Embodiments of the present disclosure provide a self-aligned contact for a trench power MOSFET device. The device has a layer of nitride provided over the conductive material in the gate trenches and over portions of mesas between every two adjacent contact structures. Alternatively, the device has an oxide layer over the conductive material in the gate trenches and over portions of mesas between every two adjacent contact structures. It is emphasized that this abstract is provided to comply with rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.

Self-aligned contact for trench power MOSFET

A trench MOSFET device is fabricated with body source regions that undulate along a channel width direction of the MOSFET device such that the body region and source region have variations in depth along the channel width direction. The undulations increase a channel width of the MOSFET device.

Method for fabricating a folded channel trench MOSFET

A bi-directional semiconductor switching device includes first and second vertical field effect transistors (FETs) formed in tandem from a semiconductor substrate. A source for the first FET is on a first side of the substrate and a source for the second FET is on a second side of the substrate opposite the first side. Gates for both the first and second FETs are disposed in tandem in a common set of trenches formed a drift region of the semiconductor substrate that is sandwiched between the sources for the first and second FETs. The drift layer acts as a common drain for both the first FET and second FET.

A switch circuit includes a first MOS transistor and a second MOS transistor of a same conductivity type connected in parallel between a first terminal and a second terminal. The first and second MOS transistors have respective gate terminals coupled to the control terminal to receive a control signal to turn the switch circuit on or off where the control signal transitions from a first voltage level to a second voltage level at a slow rate of change. The first MOS transistor has a first threshold voltage and the second MOS transistor has a second threshold voltage where the first threshold voltage is less than the second threshold voltage.

MOSFET switch circuit for slow switching application

A bi-directional switch device includes two inter-digitated back-to-back vertical metal oxide semiconductor field effect transistors (MOSFETs) formed on a substrate with their drains connected together, but otherwise isolated from each other.

Device structure having inter-digitated back to back MOSFETs

A trench metal-oxide-semiconductor field-effect transistor (MOSFET) device, comprising a substrate of a first conductivity type, a body region of a second conductivity type, a gate electrode formed in a gate trench extending in the body region and substrate, a lightly doped source region and a heavily doped source region formed in the body region, and a source contact extending to the body region formed in a source contact trench next to the gate trench. The lightly doped source region is extended deeper in the body region than the heavily doped source region. The lightly doped source region is adjacent to the source contact trench. A ballast resistor is formed at the lightly doped source region between the heavily doped source region and the body region and a Schottky diode is formed at a contact between the source contact and the lightly doped source region.

Compact source ballast trench MOSFET and method of manufacturing

Aspects of the present disclosure disclose a superjunction trench MOSFET device for low voltage or medium voltage devices and a method of fabricating the same. The superjunction trench MOSFET device according to aspects of the present disclosure comprises an active cell region and a termination region disposed at an outer periphery of the active cell region. The active cell region comprises an array of device cells with the superjunction structure. The termination region may comprise a termination structure. In one embodiment, the termination structure includes guard rings in an intrinsic epitaxial layer. In one embodiment, the termination structure includes an array of floating P columns. In another embodiment, the termination structure includes an array of floating P columns and floating termination trenches.

Method of manufacturing LV/MV super junction trench power MOSFETs

A switch circuit includes a first MOS transistor and a second MOS transistor of a same conductivity type connected in parallel between a first terminal and a second terminal of the switch circuit, the first and second MOS transistors having respective gate terminals coupled to the control terminal to receive a control signal to turn the first and second MOS transistors on or off. The first MOS transistor is characterized by a first reverse gate-to-drain capacitance (C) and the second MOS transistor is characterized by a second Cthat is greater than the first C.

Forming switch circuit with controllable phase node ringing

A shielded gate trench field effect transistor comprises an epitaxial layer above a substrate, a body region, a trench formed in the body region and epitaxial layer and one or more source regions formed in a top surface of the body region and adjacent a sidewall of the trench. A shield electrode is formed in a lower portion of the trench and a gate electrode is formed in an upper portion of the trench above the shield electrode. The shield electrode is insulated from the epitaxial layer by a first dielectric layer. The gate electrode is insulated from the epitaxial layer by the first dielectric layer and insulated from the shield electrode by a second dielectric layer. The first and second dielectric layer has a same thickness.

Scalable SGT structure with improved FOM

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Sunnyvale, CA, United States of America

Sik Lui