Taiwan Semiconductor Manufacturing Comp. Ltd.

Sih-Jie Liu

Huicheng Chang

Chun-Feng Nieh

Yee-Chia Yeo

Bau-Ming Wang

Che-Fu Chiu

A method of transferring semiconductor wafers and a semiconductor wafer support device including lift pins having a first end configured to contact a backside surface of the semiconductor wafer and at least one stress reduction feature. The stress reduction feature may be configured to reduce contact stress between the lift pins and the wafer.

Method and device to reduce epitaxial defects due to contact stress upon a semicondcutor wafer

A method of forming a semiconductor device includes performing a first implantation process on a semiconductor substrate to form a deep p-well region, performing a second implantation process on the semiconductor substrate with a diffusion-retarding element to form a co-implantation region, and performing a third implantation process on the semiconductor substrate to form a shallow p-well region over the deep p-well region. The co-implantation region is spaced apart from a top surface of the semiconductor substrate by a portion of the shallow p-well region, and the dee p-well region and the shallow p-well region are joined with each other. An n-type Fin Field-Effect Transistor (FinFET) is formed, with the deep p-well region and the shallow p-well region acting as a well region of the n-type FinFET.

Reduce well dopant loss in FinFETs through co-implantation

A method of forming a semiconductor device includes performing a first implantation process on a semiconductor substrate to form a deep p-well region, performing a second implantation process on the semiconductor substrate with a diffusion-retarding element to form a co-implantation region, and performing a third implantation process on the semiconductor substrate to form a shallow p-well region over the deep p-well region. The co-implantation region is spaced apart from a top surface of the semiconductor substrate by a portion of the shallow p-well region, and the deep-well region and the shallow p-well region are joined with each other. An n-type Fin Field-Effect Transistor (FinFET) is formed, with the deep p-well region and the shallow p-well region acting as a well region of the n-type FinFET.

Growing community of inventors

Hsinchu, Taiwan

Sih-Jie Liu