International Business Machines Corporation

Sigal Asaf

Allon Adir

Ariel Farkash

Micha Gideon Moffie

Itai Jaeger

Laurent Fournier

Lev Greenberg

Anatoly Koyfman

Ofer Peled

Alion Adir

Ziv Abraham

Shay Zadok

Embodiments of the present systems and methods may provide techniques to distinguish between data categories. For example, a method implemented in a computer system may comprise obtaining, at the computer system, a plurality of data strings in different categories, each category having a same string pattern, determining a loose string format and a set of restrictions based on at least one string pattern, classifying the plurality of data strings to respective different categories based on a loose string format of the data strings and on the restrictions on the data strings of the different categories using a classification score indicating utilizing restriction information of other categories when determining the matching of a category, and decreasing the classification score if a mean restriction matching proportion is not part of a category or is a threshold amount above an expected mean restriction matching proportion.

Exploitation of domain restrictions for data classification

Automated classification, by: Obtaining an examined document having an examined value appearing therein. Identifying: a location in the examined document at which the examined value appears, and a structure of the examined value. Identifying additional documents of a same type as the examined document, in which values having a same structure as the examined value appear at a same location as in the examined document. Applying a classifier to the examined value and the values in the additional documents, to output a single class to which the examined value and the values in the additional documents belong.

Value classification by contextual classification of similar values in additional documents

A method for compliance testing of a circuit design that includes at least one processor and a memory includes defining a memory model. The memory model includes synchronization mechanisms for synchronizing access to the memory by software instructions in different program threads running on the at least one processor. Synchronization-related parameters, which are applicable to at least one sequence of the software instructions in the different program threads, are specified. A coverage model is defined as a multi-dimensional cross-product of values of the synchronization-related parameters. At least one test program is generated using the coverage model, and a compliance of the design with the memory model is tested by subjecting the design to the at least one test program.

Testing the compliance of a design with the synchronization requirements of a memory model

A parametrically controlled model-based test generator automatically generates architectural compliance test suites for different implementations of a processor architecture, based on a set of architectural decisions chosen among optional behaviors for each implementation. Thus, different implementations of the same architecture can be easily supported by modifying the parameter values. In addition, ongoing changes to the architecture or comprehensive updates to the test suite can be easily handled by updating the architecture model or the coverage models, forgoing the need to review the whole, potentially huge, set of tests.

Automatic generation of test suite for processor architecture compliance

Methods and systems are presented for generation of a test suite in order to validate compliance of a process with its process specification. The methodology involves a formal description of the process using a flowchart, refinement of the flowchart to include misinterpretations of the process specification, defining compliance coverage models over the flowchart, and automatically generating test case scenarios that cover the models. Internal and external types of misinterpretation are distinguished. A compliance test suite is automatically generated and observations made of the details of the traversal through the flow chart when the tests are executed.

Systematic compliance checking of a process

A method and system for generating numerical test cases for testing binary floating-point arithmetic units for addition and subtraction operations, in order to verify the proper operation of the units according to a specified standard. The space for eligible test-cases is compatible with masks which stipulate the allowable forms of the operands and the result, including constant as well as variable digits in both the exponent and significand fields. The test-cases, which are generated randomly, cover the entire solution space without excluding any eligible solutions. All standard rounding modes are supported, and if a valid solution does not exist for a given set of masks, this fact is reported. The method is general and can be applied to any standard, such as the IEEE floating-point standard, in any precision. A system according to the present invention utilizes a set of sub-generators for biased exponents and significands, and also incorporates a fixed-point generator for performing calculations common to the other generators. The method relies on searching for solutions based on feasible carry sequences, and is also capable of generating test-cases for mask-constrained carry sequences.

Growing community of inventors

Zichron Yaakov, Israel

Sigal Asaf