Koninklijke Philips Corporation N.v.

Philips Electronics North America Corporation

Zih Corporation

Ipr Licensing, Inc.

Other

Nxp B.v.

Mediatek Corporation

Triquint Semiconductor Corporation

Cognio, Inc.

Zebra Technologies Corporation

Sifen Luo

Tirdad Sowlati

Gary L Sugar

Chandra Vaidyanathan

Edward Anthony Richley

Kerry Burger

Stephen L Wong

Chieh-Yuan Chao

Yiping Fan

George E Nohra

Hongyu Li

Chris Joly

Metallization layer structures for reduced changes in radio frequency characteristics due to registration error and associated methods are provided herein. An example resonator includes a first conductive layer defining an error limiting feature and a second conductive layer. The resonator further includes at least one communication feature configured to electrically couple the first conductive layer and the second conductive layer at a communication position. The error limiting feature is configured to reduce changes in radio frequency characteristics of the resonator due to registration error. Methods of manufacturing resonators are also provided herein.

Structures for registration error compensation

Various embodiments provide a bias circuit for a radio frequency (RF) power amplifier (PA) to provide a direct current (DC) bias voltage, with bias boosting, to the RF PA. The bias circuit may include a bias transistor that forms a current mirror with an amplifier transistor of the RF PA. The bias circuit may further include a first resistor coupled between the gate terminal and the drain terminal of the bias transistor to block RF signals from the gate terminal of the bias transistor. The bias circuit may further include a second resistor coupled between the drain terminal of the bias transistor and the RF PA (e.g., the gate terminal of the amplifier transistor). An amount of bias boosting of the DC bias voltage provided by the bias circuit may be based on an impedance value of the second resistor.

Bias-boosting bias circuit for radio frequency power amplifier

A radio transmitter and method controls efficiency of each of a plurality of power amplifiers that amplify a corresponding one of a plurality of radio frequency signals for a beamforming transmission by a corresponding one of a plurality of antennas. Each of the plurality of power amplifiers is controlled to operate with one or more operating parameters that optimize the efficiency for an output power level of corresponding ones of the radio frequency signals. Transmit weights for transmit signals are determined and updated on a per-packet basis.

Control of power amplifiers in devices using transmit beamforming

The present invention provides methods and apparatuses for an amplifier circuit for amplifying an input signal. An amplifier circuit for amplifying an input signal comprises an amplifying transistor circuit having a power transistor and a dc bias circuit having a plurality of current mirror circuits and a discharge transistor wherein the discharge transistor and the power transistor form a combined current mirror circuit to control quiescent current in the power transistor.

RF amplifier with a bias boosting scheme

An amplifier circuit () includes an amplifying transistor (Q&#xd8;) and an impedance-controllable dc bias circuit () for biasing the amplifier transistor (Q&#xd8;) to obtain a conduction angle of at least about 180&#xb0;. The dc bias circuit () includes a self-bias boosting circuit having separate current sources (Ibias, Iclass) for independently controlling the output impedance of the dc bias circuit () and the quiescent current of the amplifier transistor (Q&#xd8;), and has a Wilson current-mirror (Q, Q, Q, Q) integrated with a cascode current-mirror circuit (Q, Q, Q) to form an extended Wilson current-mirror circuit (Q-Q) having an output coupled to a control terminal of the amplifying transistor (Q&#xd8;) by a resistor (R), and a capacitor (C) coupled from the extended Wilson current-mirror circuit (Q-Q) to a common terminal (Gnd).

Amplifier circuit having an impedance-controllable bias-boosting circuit

An amplifier circuit () includes an amplifying transistor (Q&#xd8;) and a dc bias circuit () for biasing the amplifier transistor (Q&#xd8;) to obtain a conduction angle of at least about 180&#xb0;. The dc bias circuit () includes a self-bias boosting circuit which has a Wilson current-mirror (Q, Q, Q) integrated with a cascode current-mirror circuit (Q, Q) to form an extended Wilson current-mirror circuit (Q-Q) having an output coupled to a control terminal of the amplifying transistor (Q&#xd8;) by a resistor (R), and a capacitor (C) coupled from the extended Wilson current-mirror circuit (Q-Q) to a common terminal (Gnd).

Amplifier circuit having an extended Wilson current-mirror self-bias boosting circuit

Systems and methods for optimizing the efficiency of each of a plurality of power amplifiers that amplify a corresponding one of a plurality of radio frequency signals for transmission by a corresponding one of a plurality of antennas. Using transmit beamforming, the power of each amplified signal output by the power amplifiers may not be the same for all the power amplifiers, and may vary with changes in the communication channel between the transmitting device and receiving device. Each of the plurality of power amplifiers is controlled to operate with one or more operating parameters that optimize the efficiency for an output power level of corresponding ones of the radio frequency signals. By adjusting one or more operating parameters of each power amplifier according to changing requirements (e.g., the destination device and channel conditions), the efficiency of each power amplifier can be optimized. Consequently, one or more of the power amplifiers are operated with one or more operating parameters that reflects the output power actually needed for the corresponding radio frequency signal to be transmitted.

Efficiency of power amplifiers in devices using transmit beamforming

Improving the efficiency of power amplifiers in devices using transmit beamforming

A power amplifier circuit includes an amplifying transistor and a dc bias circuit for biasing the amplifier transistor to obtain a conduction angle of at least about 180 &deg;. The dc bias circuit includes a dynamic bias boosting circuit for increasing the dc bias current provided to the amplifying transistor by the dc bias current in direct proportion to an increase in the input signal provided to the power amplifier. An input to the dc bias circuit is coupled to a stage of the power amplifier circuit by a capacitor. The bias boosting circuit permits the power amplifier circuits to operate in Class B or Class AB with improved linearity, improved efficiency and reduced idle current.

Capacitor coupled dynamic bias boosting circuit for a power amplifier

A self-biased cascade amplifier circuit includes first and second transistors connected in series and coupled between a dc voltage source terminal and a common terminal. An input signal terminal is coupled to a control electrode of the first transistor, and an output signal terminal is coupled to an output terminal of the second transistor. An integrated bias circuit is coupled between the dc voltage source terminal and the common terminal for internally biasing both the first and the second transistors without the use of an external bias supply or a direct bias connection to the dc voltage source. This arrangement provides a fully self-biased cascode amplifier circuit having improved performance and a simple and compact configuration.

Simple self-biased cascode amplifier circuit

A shorting element, preferably a resonant inductor-capacitor circuit, is inserted in parallel with a sense transistor, which itself is in parallel with a power transistor. The use of the shorting element in combination with the sense transistor, provides a technique to have a monotonic power detection. The shorting element eliminates extraneous currents caused by inherent collector-base and collector-substrate diodes of sense transistor, and also eliminates the extraneous collector voltage swing of the sense transistor caused by mutual coupling between inductors connected to the power and sense transistors.

Power measurement circuit including harmonic filter

A bias circuit having a relatively long time constant improves the linearity of a radio frequency power amplifier of a spread spectrum mobile telephone by causing a power transistor of the amplifier to operate in class A or AB mode. The power amplifier thus derives an output signal that is a substantial replica of the spread spectrum input signal for all amplitudes of the input signal. The bias circuit has transistors connected in a feedback circuit which tends to oscillate to affect the amplifier operation. A low pass filter connected to the transistors suppresses the tendency. An interstage high pass matching circuit between a linear amplifier that drives the power amplifier includes a series capacitor and an inductor connected between an output terminal of the linear amplifier and a DC power supply terminal.

Radio frequency power amplifier for cellular telephones

A tuning circuit for compensating an inter-stage matching network included in an integrated multistage radio frequency (RF) amplifier includes one or more capacitors connected in shunt between ground and a voltage supply to the amplifier. The capacitors have values selected to effectively compensate the inductance from a pull-up inductor included in the inter-stage matching network to provide improved inter-stage matching when inductance and capacitance values of the inter-stage matching network deviate from their desired values due to parasitics and/or when other components, such as input-stage and output-stage transistors of the amplifiers deviate from their pre-fabrication simulation models.

Apparatus and method for tuning an inter-stage matching network of an integrated multistage amplifier

A power amplifier circuit includes an amplifying transistor and a dc bias circuit for biasing the amplifier transistor to obtain a conduction angle of at least about 180&deg;. The dc bias circuit includes a self-bias boosting circuit for initially decreasing and then increasing the dc bias voltage provided to a control terminal of the amplifying transistor by the dc bias circuit as the input signal provided to the power amplifier increases. The self-bias boosting circuit is extremely simple and compact in design, and permits the power amplifier circuits to operate in Class B or Class AB with improved power output characteristics.

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Sifen Luo