Advanced Micro Devices Corporation

Infineon Technologies Ag

Sie Boo Chiang

Jacques Ah Wong

Beng Chew Khou

Horst Theuss

Klaus Elian

Guenther Ruhl

Jochen Dangelmaier

Franz Michael Darrer

Mathias Vaupel

Manfred Fries

Thomas Mueller

Tue Fatt David Wee

Matthias Rose

Stephan Auer

A sensor arrangement according to an embodiment includes a substrate, and at least one sensor and a control circuit mounted on the substrate, wherein the at least one sensor and the control circuit are located on the substrate to be mountable inside a battery cell and outside the battery cell, respectively.

Sensor arrangement, battery cell and energy system

A method and arrangement for testing different types of external memories that can be coupled to a network interface controller. The network interface controller interprets the results of the memory test differently in accordance with the memory type. A fail state indicator is used by test controller to indicate the proper offset to add or subtract to a test address to calculate the actual failing memory location.

Method and apparatus for exercising external memory with a memory built-in self-test

A method and arrangement for performing a memory built-in self test (MBIST) of an external memory and an internal memory of a network interface controller includes a series of burst write and burst read operations if an external memory is detected. The sequence of burst operations tests the back-to-back burst write, back-to-back burst write burst read, back-to-back burst read and back-to-back burst read burst write capabilities of the external memory, to thereby fully exercise the external memory. Additionally, the internal memory is tested by single write and single read accesses.

Growing community of inventors

Singapore, Singapore

Sie Boo Chiang