Amazon Technologies, Inc.

Siddharth Malkani

Sundeep Amirineni

Dana Michelle Vantrease

Horace Lau

A technique to stress test an integrated circuit design under test in a simulation environment may include running a simulation that includes providing bus interface transactions and idle cycles on a bus interface of an integrated circuit design. The technique may further include capturing bus interface activity on the bus interface during the simulation to generate a stimulus file and replaying the simulation by executing a test bench driver that reads the stimulus file and injects the bus interface transactions with modified idle cycles onto the bus interface of the integrated circuit design.

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Leander, TX, United States of America

Siddharth Malkani