Intel Corporation

Siddharth K Alur

Amruthavalli Pallavi Alur

Sri Chaitra J Chavali

Kyu Oh Lee

Sri Chaitra Jyotsna Chavali

Sai Vadlamani

Wei-Lun Kane Jen

Amanda E Schuckman

Lilia May

Rahul N Manepalli

Rahul Jain

Vipul V Mehta

Ashish Dhall

Sheng C Li

Kristof Darmawikarta

Robert Alan May

Cheng Xu

Andrew James Brown

Ji Yong Park

Lauren Ashley Link

Liwei Cheng

Sri Chaitra Chavali

Srinivas V Pietambaram

Islam A Salama

Sri Ranga Sai Boyapati

Brandon C Marin

Yikang Deng

Whitney Michael Bryks

Jonathan Rosch

Amruthavalli Palla Alur

Numair Ahmed

Cary Kuliasha

Brent Williams

Mollie Stewart

Nathan Ou

Xin Ning

Lisa Ying Ying Chen

An apparatus is provided which comprises: a substrate, a die site on the substrate to couple with a die, a die side component site on the substrate to couple with a die side component, and a raised barrier on the substrate between the die and die side component sites to contain underfill material disposed at the die site, wherein the raised barrier comprises electroplated metal. Other embodiments are also disclosed and claimed.

Package with underfill containment barrier

Transmission pathways in substrates, and associated methods are shown. Example transmission pathways include a semiconductor substrate with a core, a dielectric layer fixed on the core, at least one first electrical transmission pathway extending through at least one of the dielectric layer and the core. The first pathway includes a magnetic material disposed within the at least the core of the at least one first electrical transmission pathway, at least one second electrical transmission pathway extending through the magnetic material, a nickel layer disposed on inner circumferential surface of the magnetic material at least within the second electrical transmission pathway, a copper layer disposed on at least the nickel layer within the second electrical transmission pathway. The dielectric spacer or the nickel layer separates the copper layer from the magnetic material. At least one third pathway extends through at least one of the dielectric layer and the core separate from the at least one electrical transmission pathway.

Magnetic inductor device and method

Generally discussed herein are systems, devices, and methods that include an organic high density interconnect structure and techniques for making the same. According to an example a method can include forming one or more low density buildup layers on a core, conductive interconnect material of the one or more low density buildup layers electrically and mechanically connected to conductive interconnect material of the core, forming one or more high density buildup layers on an exposed low density buildup layer of the one or more low density buildup layers, conductive interconnect material of the high density buildup layers electrically and mechanically connected to the conductive interconnect material of the one or more low density buildup layers, and forming another low density buildup layer on and around an exposed high density buildup layer of the one or more high density buildup layers.

High density organic interconnect structures

Embodiments include an electronic package and methods of forming an electronic package. In an embodiment, the electronic package comprises a substrate, and a plurality of conductive features formed over the substrate. In an embodiment, a bilayer build-up layer is formed over the plurality of conductive features. In an embodiment, the bilayer build-up layer comprises a first dielectric layer and a second dielectric layer. In an embodiment, a surface of the first dielectric layer comprises depressions. In an embodiment, the second dielectric layer is disposed in the depressions of the surface of the first dielectric layer.

Multi-layer solution based deposition of dielectrics for advanced substrate architectures

An apparatus system is provided which comprises: a substrate; a metal pillar formed on the substrate, the metal pillar comprising a first section and a second section, wherein the first section of the metal pillar is formed by depositing metal in a first opening of a first photoresist layer, and wherein the second section of the metal pillar is formed by depositing metal in a second opening of a second photoresist layer.

Formation of tall metal pillars using multiple photoresist layers

Embodiments include antennas, methods of forming antennas, and a semiconductor package. An antenna includes a feed port disposed in a substrate, and the feed port having a first patch and a second patch. The first patch is disposed on a top surface of substrate, and the second patch is disposed on a bottom surface of substrate. The antenna includes a photoimageable dielectric (PID) disposed on the bottom surface of substrate, where PID surrounds the second patch. The antenna includes a third patch disposed on PID, where the third patch is below the second patch. The antenna includes a cavity disposed between the second and third patches, where the cavity is enclosed by PID and third patch. An additional antenna includes a patch disposed on a first substrate, and a feed port disposed in a second substrate. This antenna includes a composite layer disposed between the first and second substrates.

Low z-height, ultra-low dielectric constant air cavity based and multi-core/highly asymmetric antenna substrate architectures for electrical performance improvements in 5G mm-wave applications

Semiconductor packages including package substrates having polymer-derived ceramic cores are described. In an example, a package substrate includes a core layer including a polymer-derived ceramic. The polymer-derived ceramic may include filler particles to control shrinkage and reduce warpage of the core layer during fabrication and use of the package substrate. The core layer may include counterbores or blind holes to embed a contact pad or an electrical interconnect in the core layer. A semiconductor die may be mounted on the package substrate and may be electrically connected to the contact pad or the electrical interconnect.

Package substrate having polymer-derived ceramic core

According to various embodiments of the present disclosure, an electrically conductive pillar having a substrate is disclosed. The electrically conductive pillar can comprise a first portion, second portion and a third portion. The first portion and/or third portion can be formed of an electrically conductive material that can be the same or different. The second portion can be intermediate and abut both the first portion and the third portion. The second portion can comprise a solder element formed of a second electrically conductive material that differs from the electrically conductive material and has a second stiffness less than a stiffness of the electrically conductive material.

Electrical interconnections with improved compliance due to stress relaxation and method of making

An electronic interconnect may include a substrate. The substrate may include a passageway in the substrate. The passageway may extend from a first surface of the substrate toward a second surface of the substrate. The passageway may be closed at an end of the passageway. The electronic interconnect may include a plated through hole socket coupled to the passageway. The electronic interconnect may include a contact. The contact may include a pin. The pin may be configured to engage with the plated through hole socket. The electronic interconnect may include a solder ball. The solder ball may be coupled to the plated through hole socket.

Plated through hole socketing coupled to a solder ball to engage with a pin

Described are example microelectronic devices including structures, such as build-up layers, formed of a non-homogeneous photoimageable dielectric material. The non-homogeneous photoimageable dielectric material includes two regions forming opposite surfaces of the material. A first region includes a first carbon content, and a second region located above the first region includes a second carbon content which is greater than that of the first region. The second region of the photoimageable dielectric material provides enhanced adhesion with metal that may be deposited above the material, such as a sputtered metal seed layer to facilitate subsequent deposition of an electroless metal over the non-homogeneous photoimageable dielectric material.

Microelectronic device including non-homogeneous build-up dielectric

Growing community of inventors

Chandler, AZ, United States of America

Siddharth K Alur