Intersil Americas Inc.

Sicheng Chen

Congzhong Huang

Xuelin Wu

Haito Hu

A DC-DC voltage converter has a pair of switching transistors to provide an output voltage and are alternately switched in a boost mode of operation responsive to control signals. An inductor is connected to the pair of switching transistor and has an inductor current flowing there through. A current sensor monitors an input current and generates a current sense signal responsive thereto. Control circuitry generates the control signals to the second pair of switching transistors responsive to the current sense signal, the output voltage and a current limit signal, wherein when the current limit signal indicates the inductor current exceeds a current limit the control signals configure the pair of switching transistors to decrease the inductor current.

System and method for current limiting a DC-DC converter

A buck boost converter generates a regulated output voltage responsive to an input voltage and switching control signals. Switching control circuitry generates the switching control signals responsive to the regulated output voltage, a maximum duty cycle signal and a mode signal. Mode control circuitry generates the maximum duty cycle signal and the mode signal responsive to a buck PWM signal and a boost PWM signal, a first clock signal and a second clock signal phase shifted from the first clock signal by a fixed, programmable amount. A phase shifter generates the first clock signal and the second clock signal responsive to a reference voltage and a synchronization signal.

Clock phase shifter for use with buck-boost converter

A buck voltage converter comprises an upper switching transistor connected between an input voltage node and a phase node. The upper switching transistor turns on and off responsive to a first drive signal. A lower switching transistor is connected between the phase node and ground. The lower switching transistor turns on and off responsive to a second drive signal. An inductor is connected the phase node and an output voltage node. Control circuitry generates the first drive signal and the second drive signal responsive to a feedback voltage monitored at the output voltage node and a phase at the phase node. In a pulse frequency mode voltage of operation the control circuitry turns off the upper switching transistor and turns on the lower switching transistor responsive to a determination that a predetermined period of time has occurred since a detection of a phase switch at the phase node and turns off both the upper switching transistors and the lower switching after the lower switching transistor has been turned on for a second predetermined period of time.

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Plano, TX, United States of America

Sicheng Chen