Massachusetts Institute of Technology

National University of Singapore

Nanyang Technological University

Globalfoundries Singapore Pte. Ltd.

Siau Ben Chiah

Li Hong Zhang

Eng Kian Kenneth Lee

Bing Wang

Eugene A Fitzgerald

Soo Jin Chua

Jurgen Michel

Joseph Sylvester Chang

Wei Shu

Li-Shiuan Peh

Soo-Jin Chua

Yong Qu

Wenjia Zhang

Zhaomin Zhu

Kwang Hong Lee

Chor Shu Cheng

Chao Li

Kenneth Eng Kian Lee

Sean Lian

Chee Kong Leong

Ming Lei

Lieyong Yang

Hua Xiao

Xiongfei Yu

Kelvin Tianpeng Guan

Puay San Chia

Gary Chia

Kin San Pey

Disclosed is a subpixel circuitcomprising: a first switching deviceresponsive to a digital periodic signal Vto provide a digital control signal Vrelating to a digital data signal V, the digital periodic signal Vdefining 2+1 time slots within each frame cycle, where N is a predetermined integer. The digital data signal Vhas a predetermined value at a predetermined one of the 2+1 time slots; and the subpixel circuitfurther comprises a second switching deviceresponsive to the control signal Vc to drive an associated light emitting element

Subpixel circuitry for driving an associated light element, and method, display system and electronic device relating to same

A method of forming a multilayer structure for a pixelated display and a multilayer structure for a pixelated display is provided. The method comprising providing a first wafer comprising first layers disposed over a first substrate, said first layers comprising non-silicon based semiconductor material for forming p-n junction LEDs (light emitting devices); providing a second partially processed wafer comprising silicon-based CMOS (Complementary Metal Oxide Semiconductor) devices formed in second layers disposed over a second substrate, said CMOS devices for controlling the LEDs; and bonding the first and second wafers to form a composite wafer via a double-bonding transfer process.

Method of forming a multilayer structure for a pixelated display and a multilayer structure for a pixelated display

A method of forming an integrated circuit is disclosed. The method includes: (i) forming at least a pair of optoelectronic devices from at least a first wafer material arranged on a semiconductor substrate, the first wafer material different to silicon; (ii) etching the first wafer material to form a first recess to be filled with a second material; (iii) processing the second material to form a waveguide for coupling the pair of optoelectronic devices to define an optical interconnect; and (iv) bonding at least one partially processed CMOS device layer having at least one transistor to the second semiconductor substrate to form the integrated circuit, the partially processed CMOS device layer arranged adjacent to the optical interconnect. An integrated circuit is also disclosed.

Method of forming an integrated circuit and related integrated circuit

A method () of forming an integrated circuit is disclosed. The method comprises: (i) forming at least a pair of optoelectronic devices from at least a first wafer material arranged on a semiconductor substrate, the first wafer material different to silicon; (ii) etching the first wafer material to form a first recess to be filled with a second material; (iii) processing () the second material to form a waveguide for coupling the pair of optoelectronic devices to define an optical interconnect; and (iv) bonding () at least one partially processed CMOS device layer having at least one transistor to the second semiconductor substrate to form the integrated circuit, the partially processed CMOS device layer arranged adjacent to the optical interconnect. An integrated circuit is also disclosed.

A method of forming an IC is presented. The method includes providing a substrate having a plurality of transistors formed thereon. The transistors have gate stack, source and drain regions. An electrical strap is formed and in contact with at least a portion of at least one sidewall of the gate stack of a first transistor to provide a continuous electrical flowpath over a gate electrode of the first transistor and the source or drain region of a second transistor.

Integrated circuit structure with electrical strap and its method of forming

Growing community of inventors

Singapore, Singapore

Siau Ben Chiah