Apple Inc.

Dialog Semiconductor (uk) Limited

Siarhei Meliukh

Michael Couleur

Nicola Rasera

Nikola Jovanovic

Giovanni Saccomanno

Jay B Fletcher

Sanjay Pant

Talbott Mead Houk

Fabio Ongaro

Bogdan-Eugen Matei

Nathan F Hanagami

Cang Ji

Wenxun Huang

Floyd L Dankert

Di Zhao

Alessandro Molari

Cristian Grecu

Hartmut Sturm

Yesim Inam

Ludmil N Nikolov

Seyedeh Maryam Mortazavi Zanjani

Tristan R Hudson

Nicola Florio

Chad L Olson

Giulio Maria Iadicicco

John J Sullivan

Alberto Celin

Fabio Busignani

Jonathan A Dutra

Nikola Javanovic

The present disclosure describes a system with a power management device, a wakeup circuit, a battery management device, and a connector. During a powered down mode of operation, the battery management device can provide, via the connector, a bias voltage to the wakeup circuit. In response to a wakeup switch being activated, the battery management device can provide a power supply (e.g., from a battery) to the power management device. Benefits of the wakeup circuit include (1) a reduction of battery consumption—and thus improving battery lifetime—when the electronic system is in a powered down mode of operation because the wakeup circuit has lower number of active components compared to other designs and (2) a non-complex wakeup circuit design because one or more existing connector interconnects between the power management device and the battery management device can be re-used during electronic system's powered down mode of operation.

Wakeup circuit

A tracking ADC with a feed-forward loop is disclosed. The tracking ADC includes a feedback circuit configured to generate a feedback signal using an input voltage and a comparison circuit configured to sample, using a plurality of threshold values, the feedback signal to generate a plurality of samples. A counter circuit is configured to update a count value using a subset of the plurality of samples. A digital-to-analog converter (DAC) circuit configured to generate a control signal using the count value. The feedback circuit is further configured to modify the feedback signal using the control signal and at least one of the plurality of samples. By modifying the feedback voltage, the settling time may be reduced, allowing the ADC to be run at a higher clock speed.

Feed-forward in tracking analog-to-digital converter

Circuitry for bootstrapping and precharging a gate of a field-effect transistor (FET) is disclosed. In one embodiment, an apparatus includes a first transistor coupled to a switching node and further coupled to receive a supply voltage from a supply voltage node, and a second transistor coupled between the switching node and a ground node, wherein the first and second transistors are of a same type. A precharge circuit is configured to precharge a gate terminal of the first transistor to a voltage that is less than a supply voltage on the voltage supply node. The apparatus also includes a bootstrap circuit. Subsequent to precharging the gate terminal of the first transistor, the bootstrap circuit is configured to cause activation of the first transistor by charging the gate terminal to a voltage greater than the supply voltage.

Pre-charging bootstrapped FET gate

A dual-stage boost converter is disclosed. The boost converter includes a charge pump and a boost stage. The charge pump is coupled between an input voltage source and the boost stage. The charge pump is coupled to receive the input voltage and configured to generate an intermediate voltage that is greater than the input voltage received from the input voltage source. The boost stage includes an inductor coupled to receive the intermediate voltage and is configured to generate an output voltage that is greater than or equal to the intermediate voltage.

Dual-stage boost converter

A power converter is disclosed. The power converter is configured to provide a regulated output voltage. The power converter includes a first control loop configured to generate a first voltage based on a rate of change of the regulated output voltage. A second control loop is configured to generate a second voltage based on an output current provided by the power converter. An amplifier is configured to generate a third voltage based on the first and second voltages. A control circuit is configured to control the regulated output voltage based on the third voltage.

Voltage regulator with dv/dt detection

A control system with a voltage-to-time converter for combined buck-boost converter using a single inductor. The system includes a voltage-to-time converter circuit having first and second inputs coupled to receive first and second voltage signals, respectively. The voltage-to- time converter includes a comparator configured to compare the first voltage signal and the second voltage signal and to generate a comparator output signal at a first level if the first voltage is greater than the second voltage and at a second level if the second voltage is greater than the first voltage. The voltage-to-time converter further includes an output circuit configured to generate first and second output signals based on the comparator output signal. The output circuit is configured to provide a selected one of the first or second output signals at the first level for a duration dependent on a difference between respective voltages of the first and second voltage signals.

Control system with voltage-to-time converter for combined buck-boost converter using a single inductor

A power converter circuit that includes a switch circuit, and multiple phase and amplifier circuits, may generate a voltage level on a regulated power supply node of a computer system. The amplifier circuits may generate respective demand currents using a voltage level of the regulated power supply node and a reference voltage. In response to activation of a multi-phase operating mode, the switch circuit may short the outputs of the amplifier circuits to generate a common demand current. The multiple phase circuits may sequentially source current to regulated power supply node using the common demand current.

Reconfigurable multi-phase power converter

A power converter circuit included in a computer system may include an adiabatic charge pump which includes multiple capacitors different numbers of which are used to charge and discharge a switch node coupled to regulated power supply node via an inductor. A control circuit may control the dividing ratio of the charge pump circuit as well as determine respective durations of when the charge pump circuit is charging and discharging the switch node.

Regulated power converter with adiabatic charge pump

A DC-DC converter that provides both buck and boost voltages using a single inductor is disclosed. The DC-DC converter includes an H-bridge circuit having an inductor having first and second terminals, and a number of switches. The switches include a first switch coupled between the second inductor terminal and a boost voltage node, a second switch coupled between the second inductor terminal and a buck voltage node, and a third switch coupled between the first inductor terminal and an input voltage node. A control circuit is coupled to activate the switches in accordance with a number of different phases such that a buck voltage (e.g., less than the input voltage) is provided on the buck voltage node, while a boost voltage (e.g., greater than the input voltage) is provided on the boost voltage node.

Combined buck-boost converter using a single inductor

A circuit and a method for sensing a current flowing through a pass device of a voltage converter. The pass device is switchable between a conducting state and a non-conducting state. The circuit contains an output node for providing an indication of the current flowing through the pass device, a capacitive element, connected between the pass device and the output node. A first switching element is connected between the first terminal of the capacitive element and ground. A second switching element is connected between the second terminal of the capacitive element and ground. A control circuit controls the first and second switching elements to isolate the output node from the terminal of the pass device through the capacitive element while the pass device is in the non-conducting state.

Switchless capacitive high voltage sensing

A method and circuit for trimming a bandgap reference are described. The bandgap reference circuit comprises a first diode which is arranged in series with a first resistor between a reference point and a reference potential V. The circuit also comprises a second diode which is arranged in series with a second resistor and a third resistor between the reference point and the reference potential V. In addition, the bandgap reference circuit comprises a trimming network, wherein a bandgap reference voltage Vis provided at a midpoint between the trimming network and the current source. The circuit also comprises an operational amplifier. The method () comprises measuring a first diode voltage across a replica element of the first diode; determining a first resistance of a replica element of the first resistor; and setting a resistance of the trimming network using the first diode voltage and the first resistance.

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Munich, Germany

Siarhei Meliukh