Lattice Semiconductor Corporation

T-Ram Semiconductor, Inc.

Siak Chon Kee

Craig Thomas Salling

Brad Sharpe-Geisler

Giap H Tran

Pierre Dermy

In one integrated circuit embodiment, a programmable pull-down output buffer is calibrated by sequentially configuring the buffer at different drive-strength levels and adjusting a source current applied to the buffer until the voltage at an input node of the buffer reaches a reference voltage level. A programmable pull-up output buffer is then calibrated by sequentially configuring a pull-down output buffer based on the pull-down buffer calibration results and adjusting the drive-strength level of the pull-up buffer until the voltage at a common node between the two buffers reaches a reference voltage level. Average calibration results are generated by averaging multiple calibration results for each setting. Output buffers are thereby calibrated to compensate for PVT variations without using any external resistors and without requiring any I/O pins of the integrated circuit.

PVT compensation scheme for output buffers

An electrostatic discharge protective circuit may comprise a low-pass filter and a high-pass filter to receive and filter signals of a supply line. Control logic may receive output signals of the low-pass and high-pass filters and may operate a gateable channel to shunt current of the supply line dependent on the output signals from the filters.

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Milpitas, CA, United States of America

Siak Chon Kee