Honeywell International Inc.

Ekc Technology Inc.

Shyama P Mukherjee

Roger Leung

Kreisler S Lau

Joseph A Levert

Nigel P Hacker

Nancy E Iwamoto

Lorenza Moro

Songyuan Xie

William B Bedwell

Jan Nedbal

Donald Debear

Fan Zhang

Daniel L Towery

Paul J Roman, Jr

Harold O Madsen

Leo G Svendsen

The present invention provides an organosiloxane comprising at least 80 weight percent of Formula I: [YSiO][ZSiO][HSiO]where Y is aryl; Z is alkenyl; a is from 15 percent to 70 percent of Formula I; b is from 2 percent to 50 percent of Formula I; and c is from 20 percent to 80 percent of Formula I. The present composition is useful in semiconductor devices and may be advantageously used as an etch stop.

Organosiloxanes

The present invention provides an organosiloxane comprising at least 80 weight percent of Formula 1: [YSiO]{ZSiO][HSiO](where Y is aryl; Z is alkenyl; a is from 15 percent to 70 percent of Formula 1; b is from 2 percent to 50 percent of Formula 1; and c is from 20 percent to 80 percent of Formula 1. The present organosiloxane may be used as ceramic binder, high temperature encapsulant, and fiber matrix binder. The present composition is also useful as an adhesion promoter in that it exhibits good adhesive properties when coupled with other materials in non-microelectronic or microelectronic applications. Preferably, the present compositions are used in microelectronic applications as etch stops, hardmasks, and dielectrics.

In accordance with the present invention, compositions and methods are provided in which the mechanical strength and durability of a precursor material having a plurality of pores is increased by a) providing a precursor material; b) treating the precursor material to form a nanoporous aerogel, preferably by using a supercritical drying process; c) providing a blending material having a reinforcing component and a volatile component; d) combining the nanoporous aerogel and the blending material to form an amalgamation layer; and e) treating the amalgamation layer to increase the mechanical strength of the layer by a substantial amount and to ultimately form a low dielectric material that can be utilized in various applications.

Low dielectric materials and methods of producing same

The present invention involves the hydrothermal treatment of nanostructured films to form high k PMOD&trade; films for use in applications that are temperature sensitive, such as applications using a polymer based substrate. After a PMOD&trade; precursor is deposited and converted on a substrate, and possibly after other process steps, the amorphous, nanoporous directly patterned film is subjected to low temperature hydrothermal treatment to densify and possibly crystallize the resulting high dielectric PMOD&trade; film. A post hydrothermal treatment bake is then performed to remove adsorped water.

Hydrothermal treatment of nanostructured films

The present invention relates to the planarization of surfaces as typically encountered in the fabrication of integrated circuits, particularly copper conductors and Ta/TaN barrier layers encountered in damascene and dual damascene interconnects. The present invention describes planarization methods for Cu/Ta/TaN interconnects, typically making use of a viscous overlayer tending to dwell in regions of lower surface topography, protecting said lower regions from etching by a combination of chemical and mechanical effects. In some embodiments, the viscous overlayer contains species that hinder removal of copper from regions of the surface in contact with the viscous layer. Such species may be a substantially saturated solution of copper ions among other additives, thereby hindering the dissolution of interconnect copper into the protective overlayer. In some embodiments of the present invention, the viscous overlayer may be added prior to the introduction of etchant to the wafer surface, or both etchant and viscous overlayer may be introduced substantially simultaneously, typically as the wafer is spun during planarization.

Viscous protective overlayers for planarization of integrated circuits

Chemical mechanical planarization or spin etch planarization of surfaces of copper, tantalum and tantalum nitride is accomplished by means of the chemical formulations of the present invention. The chemical formulations may optionally include abrasive particles and which may be chemically reactive or inert. Contact or non-contact CMP may be performed with the present chemical formulations. Substantially 1:1 removal rate selectivity for Cu and Ta/TaN is achieved.

Composition for chemical mechanical planarization of copper, tantalum and tantalum nitride

In accordance with the present invention, compositions and methods are provided in which the mechanical strength and durability of a precursor material having a plurality of pores is increased by a) providing a precursor material; b) treating the precursor material to form a nanoporous aerogel, preferably by using a supercritical drying process; c) providing a blending material having a reinforcing component and a volatile component; d) combining the nanoporous aerogel and the blending material to form an amalgamation layer; and e) treating the amalgamation layer to increase the mechanical strength of the layer by a substantial amount, and to ultimately form a low dielectric material that can be utilized in various applications.

An electronic component contemplated comprises a) a substrate layer, b) a dielectric layer coupled to the substrate layer, c) a barrier layer coupled to the dielectric layer, d) a conductive layer coupled to the barrier layer, and e) a protective layer coupled to the conductive layer. The electronic component contemplated herein can be produced by a) providing a substrate; b) coupling a dielectric layer to the substrate; c) coupling a barrier layer to the dielectric layer; d) coupling a conductive layer to the barrier layer; and e) coupling a protective layer to the conductive layer. The protective layer may then be cured to a desirable hardness. A method of planarizing a conductive surface of an electronic component may comprise a) introducing or coupling a protective layer onto a conductive layer; b) dispersing the protective layer across the conductive layer; c) curing the protective layer; d) introducing an etching solution onto the conductive layer; and e) etching the conductive surface to substantial planarity.

Growing community of inventors

Morgan Hill, CA, United States of America

Shyama P Mukherjee