Mitsubishi Denki Kabushiki Kaisha

Renesas Technology Corp.

Shuuichi Ueno

Yasuo Inoue

Takashi Kuroi

Katsuyuki Horita

Masayoshi Shirahata

Tomohiro Yamashita

Hidekazu Oda

Natsuo Ajika

Yasuyoshi Itoh

Haruo Furuta

A semiconductor device capable of holding multibit information in one memory cell, and a method of manufacturing the semiconductor device. A trench is formed in a channel portion of an MONOS transistor. Then, a source side portion and a drain side portion in a silicon nitride film of a gate insulating film which interpose the trench are caused to function as first and second electric charge holding portions capable of holding electric charges. In the case in which first electric charges are trapped on the drain side and second electric charges are trapped on the source side, a portion of a gate electrode in the trench functions as a shield. If a fixed potential is given to the gate electrode, the second electric charge holding portion is not influenced by an electric field induced by the first electric charges so that the trapping of the second electric charges is not inhibited.

Semiconductor device with a metal insulator semiconductor transistor

A semiconductor device having a trench isolation structure which has a high insulating characteristic, is suitable for miniaturizing a semiconductor device, and prevents a leakage current, as well as a method of manufacturing the semiconductor device. A small-density polysilicon film is formed between a semiconductor substrate and a CVD silicon oxide film in the area within a trench where a trench isolation structure is to be formed. Mechanical stress that develops between the semiconductor substrate and the CVD silicon oxide film during heat treatment is mitigated by changing the crystalline structure of the polysilicon film.

Semiconductor device and manufacturing method therefor

A semiconductor device including a well divided into a plurality of parts by a trench, to effect a reduction in layout area, and a manufacturing method thereof. In the semiconductor device, an element isolation film is formed such as to have to a depth from the main surface of a semiconductor substrate, and the area from the main surface of the substrate to the depth is divided into a plurality of first regions. A first well is formed in each of the first regions. A second well is formed in a second region deeper than the first well in the substrate, and the second well is in contact with some of the first wells.

Semiconductor device including a well divided into a plurality of parts by a trench

There is provided a method of forming an element isolation structure that can maintain its element isolation capability even with the progress of miniaturization of semiconductor elements. Through thermal processing in a nitrogen atmosphere at 900&deg; C., a non single-crystal silicon film ( ) is crystallized into single-crystal form by epitaxial growth on the main surface of a substrate, thereby to form an epitaxial silicon film ( ). The epitaxial silicon film ( ) is then planarized by CMP to expose the upper surface of an element isolation insulating film ( ). This completes the element isolation insulating film ( ) having a two-level protruding shape.

Method of manufacturing semiconductor device

Provided are a semiconductor device having a MOS transistor of a structure capable of obtaining a good characteristic particularly about assurance of resistance to punch-through and leak current reduction, as well as a method of manufacturing the same. That is, in addition to the usual MOS transistor structure, a channel dope region ( ) is disposed at a predetermined depth so as to extend substantially the entire surface of a flat surface in a P well region ( ) including a channel region. In the channel dope region ( ), it is set so that the maximum value of the P type impurity concentration (MAX of P) ranges from 1&times;10 to 1&times;10 , and the maximum value of the N type impurity concentration (MAX of N) of a source/drain region ( ( )) is not less than 10% and not more than 100%. Note that the surface proximate region of the P well region ( ) is to be beyond the object.

Semiconductor device and method of manufacturing same

A semiconductor device having a trench isolation structure which has a high insulating characteristic, is suitable for miniaturizing a semiconductor device, and prevents a leakage current, as well as a method of manufacturing the semiconductor device. A small-density polysilicon film is formed between a semiconductor substrate and a CVD silicon oxide film in the area within a trench where a trench isolation structure is to be formed. Mechanical stress that develops between the semiconductor substrate and the CVD silicon oxide film during heat treatment is mitigated by changing the crystalline structure of the polysilcon film.

Growing community of inventors

Tokyo, Japan

Shuuichi Ueno