Varian Semiconductor Equipment Associates, Inc.

Applied Materials, Inc.

Globalfoundries Inc.

Shurong Liang

Glen F R Gilchrist

Glen Gilchrist

Costel Biloiu

Vikram Singh

Richard John Hertel

Christopher W Campbell

Tsung-Liang Chen

Alexander C Kontos

Tassie Andersen

Gang Shu

Ajey Poovannummoottil Jacob

John J Hautala

Yi Qi

Kejia Wang

Piero Sferlazzo

Tyler Burton Rockwell

Alex Kontos

Bin Yang

Joseph C Olson

Steven J Bentley

Li Ping Yang

Jay R Wallace

Jeffrey E Krampert

Ernest E Allen

Sylvie M Mignot

Ashish Baraskar

Il-Woong Koo

Kenneth L Starks

Raees Pervaiz

Disclosed herein are approaches for device modification, namely, trench elongation. In one approach, a method may include providing a substrate including a plurality of surface features defining a plurality of trenches, wherein a first trench has a first trench length extending in a first direction, wherein a second trench connected to the first trench has a second trench length extending in a second direction, and wherein the first direction and the second direction are non-parallel. The method may further include delivering ions into the substrate in a reactive ion etching process, wherein the ions are delivered at a non-zero angle relative to a perpendicular extending from the substrate, and wherein the reactive ion etching process increases the first trench length of the first trench without increasing the second trench length of the second trench.

Selective trench modification using directional etch

Disclosed herein are approaches for modifying patterned features using a directional etch. In one approach, a method may include providing a stack of layers of a semiconductor device, forming an opening through the stack of layers, the opening defined by a first sidewall and a second sidewall, and delivering ions into the first sidewall in a reactive ion etching process. The ions maybe delivered at a first non-zero angle relative to a perpendicular extending from the substrate, wherein the reactive ion etching process removes a first portion of the stack of layers from just a lower section of the first sidewall.

Modifying patterned features using a directional etch

A method for patterning structures including providing a layer stack having a plurality of device layers and a hardmask layer disposed in a stacked arrangement, the layer stack having a plurality of trenches formed therein, the trenches extending through the hardmask layer and into at least one of the device layers, the trenches having lateral sidewalls with a first slope relative to a plane perpendicular to upper surfaces of the device layers, and performing a sputter etching process wherein ion beams are directed toward the hardmask layer to etch the hardmask layer and cause etched material from the hardmask layer to be redistributed along the lateral sidewalls of the trenches to provide the lateral sidewalls with a second slope relative to the plane perpendicular to the upper surfaces of the device layers, the second slope less than the first slope.

Directional modification of patterning structure to enhance pattern elongation process margin

Methods of processing a feature on a semiconductor workpiece are disclosed. The method is performed after features have been created on the workpiece. An etching species may be directed toward the workpiece at a non-zero tilt angle. In certain embodiments, the tilt angle may be 30° or more. Further, the etching species may also be directed with a non-zero twist angle. In certain embodiments, the etching species may sputter material from the features, while in other embodiments, the etching species may be a chemically reactive species. By adjusting the tilt and twist angles, as well as the flow rate of the etching species and the exposure time, the LER and LWR of a feature may be reduced with minimal impact of the CD of the feature.

Angled etch for surface smoothing

Disclosed is a semiconductor processing approach wherein a wafer twist is employed to increase etch rate, at select locations, along a hole or space end arc. By doing so, a finished hole may more closely resemble the shape of the incoming hole end. In some embodiments, a method may include providing an elongated contact hole formed in a semiconductor device, and etching the elongated contact hole while rotating the semiconductor device, wherein the etching is performed by an ion beam delivered at a non-zero angle relative to a plane defined by the semiconductor device. The elongated contact hole may be defined by a set of sidewalls opposite one another, and a first end and a second end connected to the set of sidewalls, wherein etching the elongated contact hole causes the elongated contact hole to change from an oval shape to a rectangular shape.

Methods for forming elongated contact hole ends

Provided herein are systems and methods for spatially resolved optical metrology of an ion beam. In some embodiments, a system includes a chamber containing a plasma/ion source operable to deliver an ion beam to a wafer, and an optical collection module operable with the chamber, wherein the optical collection module includes an optical device for measuring a light signal from a volume of the ion beam. The system may further include a detection module operable with the optical collection module, the detection module comprising a detector for receiving the measured light signal and outputting an electric signal corresponding to the measured light signal, thus corresponding to the property of the sampled plasma volume.

System and method for spatially resolved optical metrology of an ion beam

A workpiece processing apparatus allowing in situ cleaning of metal deposited formed on the extraction plate and in the plasma chamber is disclosed. The apparatus includes an extraction plate having an extraction aperture through which the sputtering material is passed. The apparatus also includes a sealed volume disposed within the plasma chamber which is in communication with a cleaning aperture on the extraction plate. The sealed volume is in communication with a cleaning gas, which is excited by the plasma in the plasma chamber, and can be used to clean the exterior surface of the extraction plate. The feed gas used in the plasma chamber can be selected from a sputtering species and the cleaning gas. Since the volume in the sealed volume is separated from the rest of the plasma chamber, the cleaning of the extraction plate and the cleaning of the plasma chamber may be performed independently.

Apparatus and method for differential in situ cleaning

In one embodiment, an apparatus to treat a substrate may include an extraction plate to extract a plasma beam from a plasma chamber and direct the plasma beam to the substrate. The plasma beam may comprise ions forming a non-zero angle of incidence with respect to a perpendicular to a plane of the substrate; and a gas outlet system disposed outside the plasma chamber, the gas outlet system coupled to a gas source and arranged to deliver to the substrate a reactive gas received from the gas source, wherein the reactive gas does not pass through the plasma chamber.

Apparatus and techniques to treat substrates using directional plasma and point of use chemistry

Provided herein are techniques for treating vertical surface features of a semiconductor device with ions. In some embodiments, a method for forming a semiconductor device, may include providing a set of surface features extending from a substrate, the set of surface features including a sidewall. The method may include treating the sidewall with an ion beam disposed at an angle, the angle being a non-zero angle of inclination with respect to a perpendicular to a plane of an upper surface of the substrate. The method may further include rotating the substrate about the perpendicular to the plane while the sidewall is treated with the ion beam to impact an entire height of the sidewall with the ion beam.

Angular control of ion beam for vertical surface treatment

A method may include: providing a device stack, the device stack comprising sidewall portions and extending above a substrate base, the device stack further including a plurality of metal layers; depositing an interface layer conformally over the device stack using an atomic layer deposition process, the interface layer comprising a first insulator material; depositing an encapsulation layer on the interface layer, the encapsulation layer comprising a second insulator material; and depositing an interlevel dielectric disposed on the encapsulation layer, the interlevel dielectric comprising a third insulator material.

Magnetic memory device and techniques for forming

A method may include generating a plasma in a plasma chamber, the plasma comprising an etchant species and extracting a pulsed ion beam from the plasma chamber and directing the pulsed ion beam to a substrate, where the pulsed ion beam comprises an ON portion and an OFF portion. During the OFF portion the substrate may not be biased with respect to the plasma chamber, and the duration of the OFF portion may be less than a transit time of the etchant species from the plasma chamber to the substrate.

Apparatus and techniques for anisotropic substrate etching

A workpiece processing apparatus allowing independent control of the extraction angles of charged ions and reactive neutrals is disclosed. The apparatus includes an extraction plate having an extraction aperture through which charged ions pass. Plasma sheath modulation and electric fields may be used to determine the extraction angle of the charged ions. The extraction plate also includes one or more neutral species channels, separate from the extraction aperture, through which reactive neutrals are passed at a selected extraction angle. The geometric configuration of the neutral species channels determines the extraction angle of the reactive neutrals. The neutral species channel may also comprise a suppressor, to reduce the number of charged ions that pass through the neutral species channel. The apparatus may be used for various applications, such as directed reactive ion etching.

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Poughkeepsie, NY, United States of America

Shurong Liang