Winbond Electronics Corporation

Shuo-Che Chang

Po-Yen Hsu

Bo-Lun Wu

Hsiu-Han Liao

Ching-Wei Chen

Chia-Hua Ho

Cheng-Hong Wei

Hung-Sheng Chen

Sung-Ying Wen

Wei-Che Chang

Ting-Ying Shen

Meng-Hung Lin

Tse-Mian Kuo

Hsin-Hung Chou

Yi-Chung Chen

Chia Hua Ho

Cheng-An Peng

A memory device includes a substrate, an electrical channel layer, a first electrode, a resistive switching layer, a second electrode, and a conductive structure. The electrical channel layer is disposed on the substrate. The first electrode is disposed on the substrate and extends into the electrical channel layer. The resistive switching layer is disposed between the first electrode and the electrical channel layer. The second electrode is disposed on the electrical channel layer. The conductive structure connects the electrical channel layer and the second electrode.

Memory structures and methods for forming the same

A method of wafer dicing and a die are provided. The method includes the following processes. A wafer is provided, the wafer includes a plurality of die regions and a scribe region between the die regions. The scribe region includes a substrate, and a dielectric layer and a test structure on the substrate, the test structure is disposed in the dielectric layer. A first removal process is performed to remove the test structure and the dielectric layer around the test structure, so as to expose the substrate. The first removal process includes performing a plurality of etching cycles, and each etching cycle includes performing a first etching process to remove a portion of the test structure and performing a second etching process to remove a portion of the dielectric layer. A second removal process is performed to remove the substrate in the scribe region, so as to form a plurality of dies separated from each other.

Method of wafer dicing and die

A method for manufacturing an electrode including the following steps is provided. A conductive layer is formed on a base material. A radio frequency physical vapor deposition (RF PVD) transition metal compound layer is formed on the conductive layer by using a RF PVD. A sacrificial layer is formed on the RF PVD transition metal compound layer. A planarization process is performed to remove the sacrificial layer and a portion of the RF PVD transition metal compound layer.

Method for manufacturing electrode and resistive random access memory

A method of wafer dicing is provided. The method of wafer dicing includes: providing a wafer, wherein the wafer includes a substrate, dies formed in and over the substrate and a scribe line structure located in a scribe line region between adjacent dies; removing a portion of the scribe line structure around a test device in the scribe line structure; attaching a front side of the wafer with a first tape; removing a portion of the substrate overlapping with the scribe line region from a back side of the wafer; attaching the back side of the wafer with a second tape; and removing the first tape along with the remaining portion of the scribe line structure attached thereon, leaving the dies separately attached on the second tape.

Method of wafer dicing

A resistive random access memory (RRAM) includes a top electrode (TE), a bottom electrode (BE), and a transition metal oxide (TMO) layer between the top and the bottom electrodes. The RRAM further includes a metal cap layer above the top electrode and a transparent metal oxide (TCO) layer between the metal cap layer and the top electrode.

Resistive random access memory

A resistive random access memory includes a first electrode layer, a second electrode layer, and a stacked structure disposed between the first electrode layer and the second electrode layer. The stacked structure includes a conductive layer and a resistance variable layer. The material of the conductive layer includes HfO, the material of the resistance variable layer includes HfO, and x&#x3c;y. Additionally, the diffusion rate of oxygen ions in the conductive layer is lower than the diffusion rate of the oxygen ions in metal.

Resistive random access memory and method of fabricating the same

Structures and formation methods of memory devices are provided. The memory device includes a first electrode, a second electrode, and a resistive layer positioned between the first electrode and the second electrode. The resistive layer has a crystalline portion. A volume ratio of the crystalline portion to the resistive layer is in a range from about 0.2 to about 1.

Structure and formation method of memory device

A resistive RAM and a method of manufacturing the same are provided. The resistive RAM includes a first electrode, a second electrode, a transition metal oxide (TMO) layer between the first and second electrodes, an activated metal layer between the first electrode and the TMO layer, and a metal oxynitride layer formed on a surface of the activated metal layer in the gas environment containing oxygen and nitrogen elements.

Resistive RAM and method of manufacturing the same

Provided is a resistive random access memory including a first electrode layer, a second electrode layer, and a variable resistance layer disposed between the first electrode layer and the second electrode layer, wherein the second electrode layer includes a first sublayer, a second sublayer, and a conductive metal oxynitride layer disposed between the first sublayer and the second sublayer.

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Taichung, Taiwan

Shuo-Che Chang