Fujitsu Corporation

Shunzo Ohta

Takeshi Sasaki

Hideo Monma

Yoshinori Enomoto

A circuit for checking the integrity of interconnections between chips in a chip-on-chip type IC device is fabricated in respective portions on the lower and upper chips in peripheral areas thereof intermediate the inner logic circuit of each chip and the corresponding bonding pads. Selection circuits connected between the inner logic circuit signal terminals and the corresponding bonding pads of the chip are switched by control signals to be isolated and permit normal operation of the chip or to a checking mode to isolate the inner logic circuit and permit transmission of test signals through the interconnections. The test signals received through the interconnections are compared with the test signals as transmitted to determine the integrity of the individual interconnections. The disclosed apparatus and method provide for testing of the integrity of interconnections defining single direction signal paths of individual interconnections, as between the upper and lower chips, and for selectively bidirectional transmission through the individual interconnections.

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Aizuwakamatsu, Japan

Shunzo Ohta