Mitsubishi Denki Kabushiki Kaisha

Shunyo Minesaki

Hitoshi Ishida

Minoru Shiga

Hiroyuki Fukuda

Yuichi Tokunaga

Toyohito Hatashita

A fault tolerant computer which executes the cache flush operation at a high speed and has the real time characteristic. A processor module is equipped with a cache memory so that the entry address of the updated cache block within the cache memory is stored in a stack. The cache flush is effected only with respect to the entry address in the stack when a recovery-point setting condition due to a timer or the like is satisfied. A memory module has an arrangement doubled in the same storage physical space and is equipped with a buffer memory for temporarily storing the transferred cache block, so that the cache block is simultaneously transferred to a pair of buffer memories.

Cache controller fault tolerant computer and data transfer system

A fault tolerant computer which executes the cache flush operation at a high speed and has the real time characteristic. A processor module 301 is equipped with a cache memory so that the entry address of the updated cache block within the cache memory is stored in a stack. The cache flush is effected only with respect to the entry address in the stack when a recovery-point setting condition due to a timer or the like is satisfied. A memory module 303 has an arrangement doubled in the same storage physical space and is equipped with a buffer memory for temporarily storing the transferred cache block, so that the cache block is simultaneously transferred to a pair of buffer memories.

System for performing cache flush transactions from interconnected

Cache controller with index stack for coherency fault tolerance

Growing community of inventors

Kanagawa-ken, Japan

Shunyo Minesaki