Qualcomm Incorporated

Shunxi Wang

Sameer Wadhwa

Ankit Srivastava

Rajesh Anantharaman

Ajay Taparia

Aspects of the disclosure are directed to self-capacitance measurement and cancellation. In accordance with one aspect, a self-capacitance cancellation circuit includes an input amplifier, wherein the input amplifier comprises a non-inverting input, an inverting input and an output; a coherent current source coupled to the inverting input; a feedback network coupled to the output; and a capacitance coupled to the inverting input.

Dynamic range enhancement for self-capacitance measurement

Certain aspects of the present disclosure provide a successive approximation register (SAR) analog-to-digital converter (ADC) implemented with a passive gain scaling architecture. Certain aspects provide a circuit for analog-to-digital conversion. The circuit generally includes a plurality of capacitive elements, a plurality of switches coupled to the plurality of capacitive elements, and SAR logic having an output coupled to control inputs of the plurality of switches. The circuit also includes a comparator having an output coupled to an input of the SAR logic, a sampling circuit coupled to an input node of the circuit, and a first capacitive element coupled in series between the sampling circuit and the plurality of capacitive elements.

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Palo Alto, CA, United States of America

Shunxi Wang