Sumitomo Electric Industries, Limited

Renesas Electronics Corporation

Shunsuke Yamada

Takeyoshi Masuda

Taku Horii

So Tanaka

Ryosuke Kubota

Shinji Kimura

Hideto Tamaso

Masayuki Kobayashi

Daisuke Hamajima

Toru Hiyoshi

Masaki Kijima

Keiji Wada

Kyoko Okita

Takayuki Nishiura

Tetsuya Hattori

Akira Matsushima

Takahiro Matsui

Maki Hamada

A method for manufacturing a silicon carbide semiconductor device includes preparing a silicon carbide layer including an n-type region having an n conductivity type and a p-type region having a p conductivity type, forming a material layer containing titanium, aluminum, and silicon on the n-type region and the p-type region, and forming an electrode layer in contact with the n-type region and the p-type region by heating the material layer. In forming a material layer, composition of the material layer is determined such that a point (x, y, z) (x, y, and z each being a numeric value greater than 0) representing a composition ratio among titanium, aluminum, and silicon is included in a first triangular pyramidal region having four points of the origin (0, 0, 0), a point (1, 2, 2), a point (2, 1, 2) and a point (2, 2, 1) as vertices.

Method for manufacturing silicon carbide semiconductor device and silicon carbide semiconductor device

A silicon carbide semiconductor device includes a silicon carbide substrate, a gate insulating film, and a gate electrode. The gate insulating film is provided as being in contact with the first main surface of the silicon carbide substrate. The gate electrode is provided on the gate insulating film such that the gate insulating film lies between the gate electrode and the silicon carbide substrate. In a first stress test in which a gate voltage of &#x2212;5 V is applied to the gate electrode for 100 hours at a temperature of 175&#xb0; C., an absolute value of a difference between a first threshold voltage and a second threshold voltage is not more than 0.5 V, with a threshold voltage before the first stress test being defined as the first threshold voltage and a threshold voltage after the first stress test being defined as the second threshold voltage.

Silicon carbide semiconductor device and method for manufacturing the same

The gate electrode is provided on the gate insulating film. The interlayer insulating film is provided to cover the gate electrode. The interlayer insulating film includes a first insulating film which is in contact with the gate electrode, contains silicon atoms, and contains neither phosphorus atoms nor boron atoms, a second insulating film which is provided on the first insulating film and contains silicon atoms and at least one of phosphorus atoms and boron atoms, and a third insulating film which contains silicon atoms and contains neither phosphorus atoms nor boron atoms. The second insulating film has a first surface which is in contact with the first insulating film, a second surface opposite to the first surface, and a third surface which connects the first surface and the second surface. The third insulating film is in contact with at least one of the second surface and the third surface.

Silicon carbide semiconductor device having gate electrode

A silicon carbide semiconductor device includes a silicon carbide semiconductor layer, a gate insulating film formed on the silicon carbide semiconductor layer, and a gate electrode provided on the gate insulating film, wherein the gate electrode has a polysilicon layer at least on a side of an interface with the gate insulating film, and the gate insulating film has an oxide film derived from the polysilicon layer, at an interface between the gate insulating film and the polysilicon layer of the gate electrode.

An insulating layer is formed on a substrate made of silicon carbide. By performing etching using a mask layer formed on the insulating layer, a contact hole is formed in the insulating layer to expose a contact region, which is a portion of a main surface of the substrate. The step of forming the contact hole includes a step of providing the contact region with a surface roughness Ra of not less than 0.5 nm. An electrode layer is formed in contact with the contact region. By heating the electrode layer and the substrate, siliciding reaction is caused between the electrode layer and the contact region.

Method for manufacturing silicon carbide semiconductor device

A method for manufacturing a silicon carbide substrate includes the following steps. There is prepared a silicon carbide single crystal substrate having a first main surface, a second main surface, and a first side end portion, the second main surface being opposite to the first main surface, the first side end portion connecting the first main surface and the second main surface to each other, the first main surface having a width with a maximum value of more than 100 mm. A silicon carbide epitaxial layer is formed in contact with the first side end portion, the first main surface, and a boundary between the first main surface and the first side end portion. The silicon carbide epitaxial layer formed in contact with the first side end portion and the boundary is removed.

Silicon carbide substrate, silicon carbide semiconductor device, and methods for manufacturing silicon carbide substrate and silicon carbide semiconductor device

A method for manufacturing a silicon carbide semiconductor device includes steps below. A silicon carbide substrate having a first main surface and a second main surface opposite to the first main surface, the first main surface having a maximal diameter greater than 100 mm, is prepared. An impurity region is formed on a side of the first main surface of the silicon carbide substrate. In a plan view, a cover member is arranged on the side of the first main surface so as to cover at least the entire impurity region. The silicon carbide substrate is annealed at a temperature lower than a melting point of the cover member while the cover member is arranged on the side of the first main surface of the silicon carbide substrate.

A semiconductor substrate has an element portion and a termination portion located on an outer side of the element portion. A first electrode layer is provided on a first surface of the semiconductor substrate. A second electrode layer is provided on a second surface of the semiconductor substrate in an upper portion of the element portion. An interlayer insulation film is provided on the second surface of the semiconductor substrate. The interlayer insulation film has: an element insulation portion that provides insulation between a part of the element portion of the semiconductor substrate and the second electrode layer; and a termination insulation portion covering a termination portion of the semiconductor substrate. The termination insulation portion includes a high dielectric constant film that is higher in dielectric constant than the element insulation portion.

Semiconductor device

A silicon carbide semiconductor device includes a silicon carbide substrate, a main electrode, a first barrier layer, and an interconnection layer. The main electrode is directly provided on the silicon carbide substrate. The first barrier layer is provided on the main electrode, and is made of a conductive material containing no aluminum. The interconnection layer is provided on the first barrier layer, is separated from the main electrode by the first barrier layer, and is made of a material containing aluminum.

Silicon carbide semiconductor device

A silicon carbide semiconductor device includes an element region and a guard ring region. A semiconductor element is provided in the element region. The guard ring region surrounds the element region in a plan view and has a first conductivity type. The semiconductor element includes a drift region having a second conductivity type different from the first conductivity type. The guard ring region includes a linear region and a curvature region continuously connected to the linear region. A value obtained by dividing a radius of curvature of an inner circumference portion of the curvature region by a thickness of the drift region is not less than 5 and not more than 10. Accordingly, there can be provided a silicon carbide semiconductor device capable of improving a breakdown voltage while suppressing decrease of on-state current.

A first impurity region is formed by ion implantation of a first impurity into a first main surface of a silicon carbide substrate. A metal layer is formed in contact with the first impurity region. By annealing the silicon carbide substrate and the metal layer, an electrode is formed. The metal layer is formed such that a concentration of a first impurity at a boundary portion between the metal layer and the first impurity region becomes less than a maximum value of a concentration of the first impurity in the first impurity region. The electrode is formed such that a concentration of the first impurity at a boundary portion between the electrode and the first impurity region becomes not less than 80% of a maximum value of a concentration of the first impurity in the first impurity region in a normal direction.

Silicon carbide semiconductor device and method of manufacturing same

A silicon carbide semiconductor device includes a silicon carbide substrate and a contact electrode. The silicon carbide substrate includes an n type region and a p type region that makes contact with the n type region. The contact electrode makes contact with the n type region and the p type region. The contact electrode contains Ni atoms and Si atoms. The number of the Ni atoms is not less than 87% and not more than 92% of the total number of the Ni atoms and the Si atoms. Accordingly, there can be provided a silicon carbide semiconductor device, which can achieve ohmic contact with an n type impurity region and can achieve a low contact resistance for a p type impurity region, as well as a method for manufacturing such a silicon carbide semiconductor device.

Silicon carbide semiconductor device and method for manufacturing same

An impurity of a first conductivity type is implanted onto a silicon carbide substrate through an opening in a mask layer. First and second films made of first and second materials respectively are formed. It is sensed that etching of the first material is performed during anisotropic etching, and then anisotropic etching is stopped. An impurity of a second conductivity type is implanted onto the silicon carbide substrate through the opening narrowed by the first and second films. Thus, the impurity regions can be formed in an accurately self-aligned manner.

Method of manufacturing silicon carbide semiconductor device

A silicon carbide semiconductor device includes a silicon carbide substrate, and a contact electrode. The silicon carbide substrate includes an n type region and a p type region in contact with the n type region. The contact electrode forms contact with the silicon carbide substrate. The contact electrode includes a first region containing TiSi, and a second region containing Al. The first region includes an n contact region in contact with the n type region and a p contact region in contact with the p type region. The second region is formed to contact the p type region and the n type region, and to surround the p contact region and the n contact region. Accordingly, there can be provided a silicon carbide semiconductor device including an electrode allowing ohmic contact with both a p type impurity region and an n type impurity region formed at a silicon carbide substrate.

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Osaka, Japan

Shunsuke Yamada